Specifications

CY14B108K
CY14B108M
Document Number: 001-47378 Rev. *K Page 5 of 36
Pin Definitions
Pin Name I/O Type Description
A
0
–A
19
Input Address inputs. Used to select one of the 1,048,576 bytes of the nvSRAM for × 8 configuration.
A
0
–A
18
Address inputs. Used to select one of the 524,288 words of the nvSRAM for × 16 configuration.
DQ
0
–DQ
7
Input/Output Bidirectional data I/O lines for × 8 configuration. Used as input or output lines depending on operation.
DQ
0
–DQ
15
Bidirectional data I/O lines for × 16 configuration. Used as input or output lines depending on operation.
NC No connect No connects. This pin is not connected to the die.
WE
Input Write Enable input, Active LOW. When selected LOW, data on the I/O pins is written to the specific
address location.
CE
Input Chip Enable input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
OE
Input Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read cycles.
Deasserting OE
HIGH causes the I/O pins to tristate.
BHE
Input Byte High Enable, Active LOW. Controls DQ
15
–DQ
8
.
BLE
Input Byte Low Enable, Active LOW. Controls DQ
7
–DQ
0
.
X
out
[5]
Output Crystal connection. Drives crystal on start up.
X
in
[5]
Input Crystal connection. For 32.768 kHz crystal.
V
RTCcap
[5]
Power supply Capacitor supplied backup RTC supply voltage. Left unconnected if V
RTCbat
is used.
V
RTCbat
[5]
Power supply Battery supplied Backup RTC supply voltage. Left unconnected if V
RTCcap
is used.
INT
[5]
Output Interrupt output. Programmable to respond to the clock alarm, the watchdog timer, and the power
monitor. Also programmable to either active HIGH (push or pull) or LOW (open drain).
V
SS
Ground Ground for the device. Must be connected to ground of the system.
V
CC
Power supply Power supply inputs to the device. 3.0 V +20%, –10%.
HSB
Input/Output Hardware STORE Busy (HSB)
Output: Indicates busy status of nvSRAM when LOW. After each Hardware and Software STORE
operation, HSB is driven HIGH for a short time (t
HHHD
) with standard output high current and then a
weak internal pull-up resistor keeps this pin HIGH (external pull-up resistor connection optional).
Input: Hardware STORE implemented by pulling this pin LOW externally.
V
CAP
Power supply AutoStore capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
nonvolatile elements.
Note
5. Left unconnected if RTC feature is not used.