Spread Spectrum Clock Generator Specification Sheet

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CK-SSC Spread Spectrum Clock Generato

CY25822-

Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600

Document #: 38-07531 Rev. ** Revised March 18, 2003

Features

• 3.3V operation

• 48- and 66-MHz frequency support

• Selectable slew rate control

• 350-pS jitter

•I

C programmability

• 500-µA power-down current

• Spread Spectrum for best electromagnetic interference

(EMI) reduction

• 8-pin SOIC package

Block Diagram

Pin Configuration

CLKIN

VDD

GND

*PWRDWN#

SCLOCK

SDATA

REFOUT

CY25822-2

CLKOUT

* 150KΩ Pull-up

Freq. Phase

Modulating

VCO

Post

CLKOUT

Detector

Charge

Pump

Waveform

DividersDivider

Feedback

Divider

PLL

GND

VDD

Clock Input

(SSCG Output)

REFOUT

Logic

Control

SDATA

SCLOCK

PWRDWN#

[+] Feedback

Summary of content (9 pages)

PAGE 1
CY25822-2 CK-SSC Spread Spectrum Clock Generator Features • • • • • • • 3.3V operation 48- and 66-MHz frequency support Selectable slew rate control 350-pS jitter I2C programmability 500-µA power-down current Spread Spectrum for best electromagnetic interference (EMI) reduction • 8-pin SOIC package Block Diagram VDD REFOUT Clock Input Freq.
PAGE 2
CY25822-2 Pin Description Pin No. Pin Name Pin Type 1 CLKIN Input Pin Description 48-MHz or 66-MHz Clock Input. 2 VDD Power Power Supply for PLL and Outputs. 3 GND Ground Ground for Outputs. 4 CLKOUT Output 48-MHz or 66-MHz Spread Spectrum Clock Output. 5 REFOUT Output Non-spread Spectrum Reference Clock Output. 6 SDATA I/O 7 SCLOCK Input 8 PWRDWN# Output I2C-compatible SDATA. I2C-compatible SCLOCK. LVTTL Input for PowerDown# Active Low.
PAGE 3
CY25822-2 Table 2. Block Read and Block Write Protocol (continued) .... Data Byte N –8 bits 56 Acknowledge .... Acknowledge from slave .... Data bytes from slave/Acknowledge .... Stop .... Data byte N from slave – 8 bits .... Not Acknowledge .... Stop Table 3.
PAGE 4
CY25822-2 Table 4. Spread Spectrum Select (continued) SS3 SS2 SS1 SS0 Spread Mode Spread Amount% 0 1 0 1 Down 2.0 0 1 1 0 Down 2.5 0 1 1 1 Down 3.0 1 0 0 0 Center ±0.3 1 0 0 1 Center ±0.4 1 0 1 0 Center ±0.5 1 0 1 1 Center ±0.6 1 1 0 0 Center ±0.8 1 1 0 1 Center ±1.0 1 1 1 0 Center ±1.25 1 1 1 1 Center ±1.
PAGE 5
CY25822-2 PWRDWN# CLKOUT REFOUT Figure 1. Power-down Assertion PD# <3.0m s C LK O U T R E FO U T Figure 2. Power-down Deassertion CLKOUT and REFOUT Enable Clarification The CLKOUT enable and REFOUT enable I2C register bits are used to shot-off the CLKOUT and REFOUT clocks individually. The VCO and crystal oscillator must remain on. A shutdown clock is driven low. ALL clocks need to be stopped in a predictable manner.
PAGE 6
CY25822-2 Table 5. Absolute Maximum Ratings Parameter Description Condition Min. Max. Unit VDD Core Supply Voltage –0.5 4.6 V VDD_A Analog Supply Voltage –0.5 4.6 V VIN Input Voltage Relative to V SS –0.5 VDD + 0.
PAGE 7
CY25822-2 Table 7. AC Parameters (TA = 0°C to +70°C, VDD = 3.3V ± 5%) (continued) Parameter Conditions Min. Max. tFALLL1 Falling Edge Rate Description Measured from 2.4V to 0.4V REFOUT and CLOCKOUT 1.33 4.0 tRISEH2 Rise Time Measured from 0.4V to 2.4V REFOUT and CLOCKOUT 0.4 1.0 ns High Buffer Strength Refer to I2C Control tFALLH2 Fall Time Measured from 2.4V to 0.4V REFOUT and CLOCKOUT 0.4 1.0 ns High Buffer Strength Refer to I2C Control tRISEL2 Rise Time Measured from 0.4V to 2.
PAGE 8
CY25822-2 Package Diagram 8-lead (150-Mil) SOIC – S8 51-85066-*B Purchase of I2C components from Cypress, or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.All product and company names mentioned in this document are trademarks of their respective holders. Document #: 38-07531 Rev.
PAGE 9
CY25822-2 Document History Page Document Title: CY25822-2 CK-SSC Spread Spectrum Clock Generator Document Number: 38-07531 REV. ECN NO. Issue Date Orig. of Change ** 124462 03/19/03 RGL Document #: 38-07531 Rev.