Static RAM Specification Sheet

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CY62128EV30

MoBL® 1 Mbit (128K x 8) Static RAM

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document #: 38-05579 Rev. *D Revised March 28, 2008

Features

■ Very high speed: 45 ns

❐ Temperature ranges:

• Industrial: –40°C to +85°C

• Automotive-A: –40°C to +85°C

• Automotive-E: –40°C to +125°C

■ Wide voltage range: 2.20V – 3.60V

■ Pin compatible with CY62128DV30

■ Ultra low standby power

❐ Typical standby current: 1 μA

❐ Maximum standby current: 4 μA

■ Ultra low active power

❐ Typical active current: 1.3 mA @ f = 1 MHz

■ Easy memory expansion with CE

, CE

and OE features

■ Automatic power down when deselected

■ CMOS for optimum speed and power

■ Offered in Pb-free 32-pin SOIC, 32-pin TSOP I, and 32-pin

STSOP packages

Functional Description

The CY62128EV30

[1]

is a high performance CMOS static RAM

module organized as 128K words by 8 bits. This device features

advanced circuit design to provide ultra low active current. This

is ideal for providing More Battery Life™ (MoBL

) in portable

applications such as cellular telephones. The device also has an

automatic power down feature that significantly reduces power

consumption when addresses are not toggling. Placing the

device into standby mode reduces power consumption by more

than 99% when deselected (CE

HIGH or CE

LOW). The eight

input and output pins (IO

through IO

) are placed in a high

impedance state when the device is deselected (CE

HIGH or

LOW), the outputs are disabled (OE HIGH), or a write

operation is in progress (CE

LOW and CE

HIGH and WE

LOW).

To write to the device, take Chip Enable (CE

LOW and CE

HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO

pins is then written into the location specified on the Address pin

through A

To read from the device, take Chip Enable (CE

LOW and CE

HIGH) and Output Enable (OE) LOW while forcing Write Enable

(WE

) HIGH. Under these conditions, the contents of the memory

location specified by the address pins appear on the IO pins.

SENSE AMPS

POWER

DOWN

ROW DECODER

COLUMN DECODER

128K x 8

ARRAY

INPUT BUFFER

Logic Block Diagram

Note

1. For best practice recommendations, refer to the Cypress application note “System Design Guidelines” at http://www.cypress.com.

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Summary of content (11 pages)

PAGE 1
CY62128EV30 MoBL® 1 Mbit (128K x 8) Static RAM Features Functional Description ■ Very high speed: 45 ns ❐ Temperature ranges: • Industrial: –40°C to +85°C • Automotive-A: –40°C to +85°C • Automotive-E: –40°C to +125°C ■ Wide voltage range: 2.20V – 3.60V ■ Pin compatible with CY62128DV30 ■ Ultra low standby power ❐ Typical standby current: 1 μA ❐ Maximum standby current: 4 μA ■ Ultra low active power ❐ Typical active current: 1.
PAGE 2
CY62128EV30 Pin Configuration[2] A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 25 26 27 26 28 29 30 31 32 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 STSOP Top View (not to scale) A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 OE A10 CE1 IO7 IO6 IO5 IO4 IO3 GND IO2 IO1 IO0 A0 A1 A2 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 TSOP I Top View (not to scale) OE A10 CE1 IO7 IO6 IO5 IO4 IO3 GND IO2 IO1 IO0 A0 A1 A2 A3
PAGE 3
CY62128EV30 Maximum Ratings Output Current into Outputs (LOW)............................. 20 mA Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested. Storage Temperature .................................. –65°C to +150°C Ambient Temperature with Power Applied ............................................ –55°C to +125°C Supply Voltage to Ground Potential..........................................–0.3V to VCC(max) + 0.
PAGE 4
CY62128EV30 Capacitance (For all packages)[8] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions Max Unit 10 pF 10 pF TA = 25°C, f = 1 MHz, VCC = VCC(typ) Thermal Resistance Parameter Description Test Conditions ΘJA Thermal Resistance (Junction to Ambient) ΘJC Thermal Resistance (Junction to Case) TSOP I SOIC STSOP Unit 33.01 48.67 32.56 °C/W 3.42 25.86 3.59 °C/W Still Air, soldered on a 3 x 4.
PAGE 5
CY62128EV30 Data Retention Waveform [10] DATA RETENTION MODE VCC(min) VCC VCC(min) VDR > 1.
PAGE 6
CY62128EV30 Switching Waveforms Figure 2. Read Cycle 1 (Address transition controlled) [15, 16] tRC RC ADDRESS tAA tOHA DATA OUT PREVIOUS DATA VALID DATA VALID Figure 3. Read Cycle No. 2 (OE controlled) [10, 16, 17] ADDRESS tRC CE tACE OE tHZOE tDOE tHZCE tLZOE HIGH IMPEDANCE DATA VALID DATA OUT tLZCE tPD tPU VCC SUPPLY CURRENT HIGH IMPEDANCE ICC 50% 50% ISB Figure 4. Write Cycle No.
PAGE 7
CY62128EV30 Switching Waveforms (continued) Figure 5. Write Cycle No. 2 (CE1 or CE2 controlled) [10, 14, 18, 19] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tSD DATA IO tHD DATA VALID Figure 6. Write Cycle No. 3 (WE controlled, OE LOW) [10, 19] tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE tSD DATA IO NOTE 20 tHD DATA VALID tLZWE tHZWE Table 2.
PAGE 8
CY62128EV30 Ordering Information Speed (ns) Ordering Code 45 Package Diagram Operating Range Package Type CY62128EV30LL-45SXI 51-85081 32-pin 450-Mil SOIC (Pb-free) CY62128EV30LL-45ZXI 51-85056 32-pin TSOP Type I (Pb-free) Industrial CY62128EV30LL-45ZAXI 51-85094 32-pin STSOP (Pb-free) 45 CY62128EV30LL-45ZXA 51-85056 32-pin TSOP Type I (Pb-free) Automotive-A 55 CY62128EV30LL-55ZXE 51-85056 32-pin TSOP Type I (Pb-free) Automotive-E Contact your local Cypress sales representative for ava
PAGE 9
CY62128EV30 Package Diagrams (continued) Figure 8. 32-Pin Thin Small Outline Package Type I (8 x 20 mm), 51-85056 51-85056-*D Document #: 38-05579 Rev.
PAGE 10
CY62128EV30 Package Diagrams (continued) Figure 9. 32-Pin Shrunk Thin Small Outline Package (8 x 13.4 mm), 51-85094 51-85094-*D Document #: 38-05579 Rev.
PAGE 11
CY62128EV30 Document History Page Document Title: CY62128EV30 MoBL® 1 Mbit (128K x 8) Static RAM Document Number: 38-05579 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 285473 See ECN PCI New Data Sheet *A 461631 See ECN NXR Converted from Preliminary to Final Removed 35 ns Speed Bin Removed “L” version of CY62128EV30 Removed Reverse TSOP I package from Product offering.