Dual-Port Static RAM Specification Sheet

CY7C027V/027VN/027AV/028V
CY7C037V/037AV/038V
Document #: 38-06078 Rev. *B Page 9 of 18
Switching Waveforms
Notes
15. R/W
is HIGH for read cycles.
16. Device is continuously selected CE = V
IL
and UB or LB = V
IL
. This waveform cannot be used for semaphore reads.
17. OE
= V
IL
.
18. Address valid prior to or coincident with CE
transition LOW.
19. To access RAM, CE = V
IL
, UB or LB = V
IL
, SEM = V
IH
. To access semaphore, CE = V
IH
, SEM = V
IL
.
t
RC
t
AA
t
OHA
DATA VALIDPREVIOUS DATA VALID
DATA OUT
ADDRESS
t
OHA
Figure 4. Read Cycle No. 1 (Either Port Address Access)
[15, 16, 17]
t
ACE
t
LZOE
t
DOE
t
HZOE
t
HZCE
DATA VALID
t
LZCE
t
PU
t
PD
I
SB
I
CC
DATA OUT
OE
CE and
LB
or UB
CURRENT
Figure 5. Read Cycle No. 2 (Either Port CE/OE Access)
[15, 18, 19]
UB or LB
DATA OUT
t
RC
ADDRESS
t
AA
t
OHA
CE
t
LZCE
t
ABE
t
HZCE
t
HZCE
t
ACE
t
LZCE
Figure 6. Read Cycle No. 3 (Either Port)
[15, 17, 18, 19]
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