Dual-Port Static RAM Specification Sheet

CY7C130, CY7C130A
CY7C131, CY7C131A
CY7C140, CY7C141
Document #: 38-06002 Rev. *E Page 3 of 19
Pin Definitions
Left Port Right Port Description
CE
L
CE
R
Chip Enable
R/W
L
R/W
R
Read/Write Enable
OE
L
OE
R
Output Enable
A
0L
–A
11/12L
A
0R
–A
11/12R
Address
I/O
0L
–I/O
15/17L
I/O
0R
–I/O
15/17R
Data Bus Input/Output
INT
L
INT
R
Interrupt Flag
BUSY
L
BUSY
R
Busy Flag
V
CC
Power
GND Ground
Selection Guide
Parameter
7C131-15
[4]
7C131A-15
7C141-15
7C131-25
[4]
7C141-25
7C130-30
7C130A-30
7C131-30
7C140-30
7C141-30
7C130-35
7C131-35
7C140-35
7C141-35
7C130-45
7C131-45
7C140-45
7C141-45
7C130-55
7C131-55
7C140-55
7C141-55
Unit
Maximum Access Time
15 25 30 35 45 55 ns
Maximum Operating
Current
Com’l/Ind 190 170 170 120 120 110 mA
Maximum Standby
Current
Com’l/Ind
75 65 65 45 45 35 mA
Shaded areas contain preliminary information.
Note
4. 15 and 25 ns version available only in PLCC/PQFP packages.
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