Programmable System-on-Chip Specification Sheet

ManualsBrandsCypress ManualsComputer HardwareCY8C24223A

CY8C24223A, CY8C24423A

PSoC

Programmable System-on-Chip™

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document Number: 3-12029 Rev. *E Revised December 11, 2008

Features

■ Powerful Harvard Architecture Processor

❐ M8C Processor Speeds to 12 MHz

❐ 8x8 Multiply, 32-Bit Accumulate

❐ Low Power at High Speed

❐ 4.75V to 5.25V Operating Voltage

❐ Extended Temperature Range: -40°C to +125°C

■ Advanced Peripherals (PSoC Blocks)

❐ Six Rail-to-Rail Analog PSoC Blocks Provide:

• Up to 14-Bit ADCs

• Up to 9-Bit DACs

• Programmable Gain Amplifiers

• Programmable Filters and Comparators

❐ Four Digital PSoC Blocks Provide:

• 8 to 32-Bit Timers, Counters, and PWMs

• CRC and PRS Modules

• Full-Duplex UART

• Multiple SPI™ Masters or Slaves

• Connectable to all GPIO Pins

❐ Complex Peripherals by Combining Blocks

■ Precision, Programmable Clocking

❐ Internal ± 4% 24 MHz Oscillator

❐ High Accuracy 24 MHz with Optional 32 kHz Crystal and PLL

❐ Optional External Oscillator, up to 24 MHz

❐ Internal Oscillator for Watchdog and Sleep

■ Flexible On-Chip Memory

❐ 4K Bytes Flash Program Storage 100 Erase/Write Cycles

❐ 256 Bytes SRAM Data Storage

❐ In-System Serial Programming (ISSP)

❐ Partial Flash Updates

❐ Flexible Protection Modes

■ Programmable Pin Configurations

❐ 25 mA Sink on All GPIO

❐ Pull Up, Pull Down, High Z, Strong, or Open Drain Drive

Modes on All GPIO

❐ Up to Ten Analog Inputs on GPIO

❐ Two 30 mA Analog Outputs on GPIO

❐ Configurable Interrupt on All GPIO

■ Additional System Resources

❐ I

C™ Slave, Master, and Multi-Master to 400 kHz

❐ Watchdog and Sleep Timers

❐ User-Configurable Low Voltage Detection

❐ Integrated Supervisory Circuit

❐ On-Chip Precision Voltage Reference

■ Complete Development Tools

❐ Free Development Software (PSoC Designer™)

❐ Full-Featured, In-Circuit Emulator and Programmer

❐ Full Speed Emulation

❐ Complex Breakpoint Structure

❐ 128K Bytes Trace Memory

DIGITAL SYSTEM

SRAM

256 Bytes

Interrupt

Controller

Sleep and

Watchdog

Multiple Clock Sources

(Includes IMO, ILO, PLL, and ECO)

Global Digital Interconnect

Global Analog Interconnect

PSoC CORE

CPU Core (M8C)

SROM Flash 4K

Digital

Block Array

Multiply

Accum .

Internal

Voltag e

Ref.

Digital

Clocks

POR and LVD

System Resets

Decimator

SYSTEM RESOURCES

ANALOG SYSTEM

Analog

Ref

Analog

Input

Muxing

(1 Row,

4 Blocks)

Por t 2 Por t 1 Por t 0

Analog

Driv ers

System Bus

Analog

Block

Array

(2 Columns,

6 Blocks)

Logic Block Diagram

[+] Feedback

Summary of content (31 pages)

PAGE 1
CY8C24223A, CY8C24423A PSoC® Programmable System-on-Chip™ Features ■ ■ ■ ■ ■ Powerful Harvard Architecture Processor ❐ M8C Processor Speeds to 12 MHz ❐ 8x8 Multiply, 32-Bit Accumulate ❐ Low Power at High Speed ❐ 4.75V to 5.
PAGE 2
CY8C24223A, CY8C24423A PSoC® Functional Overview Digital System The PSoC® family consists of many Mixed-Signal Array with On-Chip Controller devices. These devices are designed to replace multiple traditional MCU-based system components with one, low cost single-chip programmable device. PSoC devices include configurable blocks of analog and digital logic, and programmable interconnects.
PAGE 3
CY8C24223A, CY8C24423A The Analog System is composed of six configurable blocks, each comprised of an opamp circuit allowing the creation of complex analog signal flows. Analog peripherals are very flexible and can be customized to support specific application requirements.
PAGE 4
CY8C24223A, CY8C24423A Getting Started Additional System Resources System Resources, some of which have been previously listed, provide additional capability useful to complete systems. Additional resources include a multiplier, decimator, switch mode pump, low voltage detection, and power on reset. Brief statements describing the merits of each system resource follow: ■ ■ Digital clock dividers provide three customizable clock frequencies for use in applications.
PAGE 5
CY8C24223A, CY8C24423A Development Tools PSoC Designer Software Subsystems PSoC Designer is a Microsoft® Windows-based, integrated development environment for the Programmable System-on-Chip (PSoC) devices. The PSoC Designer IDE and application runs on Windows NT 4.0, Windows 2000, Windows Millennium (Me), or Windows XP (refer Figure 3). Device Editor PSoC Designer helps the customer to select an operating configuration for the PSoC, write application code that uses the PSoC, and debug the application.
PAGE 6
CY8C24223A, CY8C24423A Debugger The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, allowing the designer to test the program in a physical system while providing an internal view of the PSoC device. Debugger commands allow the designer to read and program and read and write data memory, read and write IO registers, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control.
PAGE 7
CY8C24223A, CY8C24423A The next step is to write your main program, and any sub-routines using PSoC Designer’s Application Editor subsystem. The Application Editor includes a Project Manager that allows you to open the project source code files (including all generated code files) from a hierarchal view. The source code editor provides syntax coloring and advanced edit features for both C and assembly language. File search capabilities include simple string searches and recursive “grep-style” patterns.
PAGE 8
CY8C24223A, CY8C24423A Pinouts The CY8C24x23A automotive PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port pin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, and XRES are not capable of Digital IO. 20-Pin Part Pinout Table 3. 20-Pin Part Pinout (SSOP) Pin No.
PAGE 9
CY8C24223A, CY8C24423A 28-Pin Part Pinout Table 4. 28-Pin Part Pinout (SSOP) Pi Type n Pin Description DigiAna- Name No tal log .
PAGE 10
CY8C24223A, CY8C24423A Register Reference Register Mapping Tables This section lists the registers of the CY8C24x23A automotive PSoC device. For detailed register information, refer the PSoC Programmable System-on-Chip Technical Reference Manual. The PSoC device has a total register address space of 512 bytes. The register space is referred to as IO space and is divided into two banks. The XOI bit in the Flag register (CPU_F) determines which bank the user is currently in.
PAGE 11
CY8C24223A, CY8C24423A Access Addr (0,Hex) Name Access Addr (0,Hex) Name Access Addr (0,Hex) Name Access Addr (0,Hex) Name Table 6.
PAGE 12
CY8C24223A, CY8C24423A Access Addr (0,Hex) Name Access Addr (0,Hex) Name Access Addr (0,Hex) Name Access Addr (0,Hex) Name Table 6.
PAGE 13
CY8C24223A, CY8C24423A ASC21CR3 97 RW Access Addr (1,Hex) Name Access Addr (1,Hex) Name Access Addr (1,Hex) Name Access Addr (1,Hex) Name Table 7.
PAGE 14
CY8C24223A, CY8C24423A Electrical Specifications This section presents the DC and AC electrical specifications of the CY8C24x23A automotive PSoC device. For the latest electrical specifications, visit http://www.cypress.com/psoc. Specifications are valid for -40oC ≤ TA ≤ 125oC and TJ ≤ 135oC, except where noted. Figure 7. Voltage versus CPU Frequency 5.25 Valid Operating Region 4.75 Vdd Voltage 3.
PAGE 15
CY8C24223A, CY8C24423A Absolute Maximum Ratings Table 9. Absolute Maximum Ratings Symbol Description TSTG Storage Temperature TA Vdd VIO VIOZ IMIO ESD LU Ambient Temperature with Power Applied Supply Voltage on Vdd Relative to Vss DC Input Voltage DC Voltage Applied to Tri-state Maximum Current into any Port Pin Electro Static Discharge Voltage Latch-up Current Min -55 Typ +25 -40 -0.5 Vss - 0.5 Vss - 0.
PAGE 16
CY8C24223A, CY8C24423A DC Electrical Characteristics DC Chip-Level Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 11. DC Chip-Level Specifications Symbol Description Min Typ Max Units Notes Vdd Supply Voltage 4.75 – 5.25 V IDD Supply Current – 5 8 mA Conditions are Vdd = 5.
PAGE 17
CY8C24223A, CY8C24423A DC Operational Amplifier Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. The Operational Amplifier is a component of both the Analog Continuous Time PSoC blocks and the Analog Switched Cap PSoC blocks. The guaranteed specifications are measured in the Analog Continuous Time PSoC block. Table 13.
PAGE 18
CY8C24223A, CY8C24423A DC Low Power Comparator Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 14. DC Low Power Comparator Specifications Symbol VREFLPC ISLPC VOSLPC Description Low power comparator (LPC) reference voltage range LPC supply current LPC voltage offset Min 0.2 – – Typ – 10 2.
PAGE 19
CY8C24223A, CY8C24423A DC Analog Reference Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. The guaranteed specifications are measured through the Analog Continuous Time PSoC blocks. The power levels for AGND refer to the power of the Analog Continuous Time PSoC block.
PAGE 20
CY8C24223A, CY8C24423A DC Analog PSoC Block Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 17. DC Analog PSoC Block Specifications Symbol Description Min Typ Max Units RCT Resistor Unit Value (Continuous Time) – 12.
PAGE 21
CY8C24223A, CY8C24423A AC Electrical Characteristics AC Chip-Level Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 20. AC Chip-Level Specifications Symbol FIMO24 Description Internal Main Oscillator Frequency for 24 MHz Min 22.95 Typ 24 Max 24.
PAGE 22
CY8C24223A, CY8C24423A Figure 8. PLL Lock Timing Diagram PLL Enable TPLLSLEW 24 MHz FPLL PLL Gain 0 Figure 9. PLL Lock for Low Gain Setting Timing Diagram PLL Enable TPLLSLEWLOW 24 MHz FPLL PLL Gain 1 Figure 10. External Crystal Oscillator Startup Timing Diagram 32K Select 32 kHz TOS F32K2 Figure 11. 24 MHz Period Jitter (IMO) Timing Diagram Jitter24M1 F 24M Figure 12. 32 kHz Period Jitter (ECO) Timing Diagram Jitter32k F 32K2 Document Number: 3-12029 Rev.
PAGE 23
CY8C24223A, CY8C24423A AC General Purpose IO Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 21.
PAGE 24
CY8C24223A, CY8C24423A AC Low Power Comparator Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 23. AC Low Power Comparator Specifications Symbol TRLPC Description LPC response time Min – Typ – Max 50 Units μs Notes ≥ 50 mV overdrive comparator reference set within VREFLPC.
PAGE 25
CY8C24223A, CY8C24423A AC Digital Block Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 24.
PAGE 26
CY8C24223A, CY8C24423A AC Analog Output Buffer Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 25. AC Analog Output Buffer Specifications Symbol Description TROB Rising Settling Time to 0.1%, 1V Step, 100 pF Load Power = Low Power = High TSOB Falling Settling Time to 0.
PAGE 27
CY8C24223A, CY8C24423A AC I2C Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only. Table 28. AC Characteristics of the I2C SDA and SCL Pins Symbol Description FSCLI2C THDSTAI2C SCL Clock Frequency Hold Time (repeated) START Condition. After this period, the first clock pulse is generated.
PAGE 28
CY8C24223A, CY8C24423A Packaging Information This section illustrates the packaging specifications for the CY8C24x23A automotive PSoC device, along with the thermal impedances for each package and the typical package capacitance on crystal pins. Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at http://www.cypress.com/design/MR10161.
PAGE 29
CY8C24223A, CY8C24423A Figure 18. 28-Pin (210-Mil) SSOP 51-85079 *C Thermal Impedances Capacitance on Crystal Pins Table 29. Thermal Impedances per Package Table 30. Typical Package Capacitance on Crystal Pins Typical θJA * Package Package Package Capacitance 20 SSOP 117 oC/W 20 SSOP 2.6 pF 28 SSOP 101 oC/W 28 SSOP 2.8 pF * TJ = TA + POWER x θJA Solder Reflow Peak Temperature The following table lists the minimum solder reflow peak temperature to achieve good solderability. Table 31.
PAGE 30
CY8C24223A, CY8C24423A Ordering Information The following table lists the CY8C24x23A automotive PSoC device group’s key package features and ordering codes.
PAGE 31
CY8C24223A, CY8C24423A Document History Page Document Title: CY8C24223A, CY8C24423A PSoC® Programmable System-on-Chip™ Document Number: 38-12029 Rev. ECN Orig. of Change Submission Date Description of Change ** 238268 SFV See ECN First release of CY8C24x23A Automotive Preliminary Data Sheet. *A 271471 HMT See ECN Update per SFV memo. Input MWR changes, including removing SMP. Change to Final. *B 286089 HMT See ECN Update characterization data. Fine tune pinouts. Add Reflow Peak Temp.