Transceiver with Reclocker Specification Sheet

CYV15G0404DXB
Document #: 38-02097 Rev. *B Page 32 of 44
Switching Waveforms for the CYV15G0404DXB HOTLink II Receiver
Notes
34. The TXCLKOx output remains at the character rate regardless of the state of TXRATE and does not follow the duty cycle of REFCLKx±.
35. The rising edge of TXCLKOx output has no direct phase relationship to the REFCLKx± input.
36. TXERRx is synchronous to RXCLKx only when RXCLKx is selected as REFCLK.
REFCLKx
RXDx[7:0],
RXSTx[2:0],
t
REFCLK
t
REFH
t
REFL
Receive Interface
Read Timing
full rate RXCLKx±
RXCLKx
t
REFxDV+
t
REFxDV –
t
RREFDA
REFCLKx Selected
t
RREFDW
t
RREFDW
TXERRx
[36]
REFCLKx
RXDx[7:0],
RXSTx[2:0],
t
REFCLK
t
REFH
t
REFL
Receive Interface
Read Timing
half rate RXCLKx±
t
RREFDA
RXCLKx
t
REFxDV+
t
REFxDV –
Note 37
t
RREFDA
REFCLKx Selected
t
RREFDW
t
RREFDW
TXERRx
[36]
RXCLKx+
RXDx[7:0],
RXSTx[2:0],
t
RXDV+
t
RXCLKP
Receive Interface
Read Timing
RXRATEx = 0
RXCLKx-
t
RXDV –
Recovered Clock selected
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