Specifications

CY7C67200
Document #: 38-08014 Rev. *H Page 73 of 85
Figure 77. HPI (Host Port Interface) Write Cycle Timing
Parameter Description Min. Typical Max. Unit
t
ASU
Address Setup –1 – – ns
t
AH
Address Hold –1 – – ns
t
CSSU
Chip Select Setup –1 – – ns
t
CSH
Chip Select Hold –1 – – ns
t
DSU
Data Setup 6 – – ns
t
WDH
Write Data Hold 2 – – ns
t
WP
Write Pulse Width 2 – – T
[11]
t
CYC
Write Cycle Time 6 – – T
[11]
Note
11. T = system clock period = 1/48 MHz.
nCS
nRD
nWR
ADDR [1:0]
Dout [15:0]
t
ASU
t
WP
t
AH
t
CSSU
t
CSH
t
CYC
t
DSU
t
WDH