Independent Clock Deserializing Reclocker Specification Sheet

CYV15G0404RB
Document #: 38-02102 Rev. *C Page 7 of 27
Pin Configuration (Bottom View)
[1]
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
A
ROUT
B2–
IN
B2–
ROUT
B1–
IN
B1–
V
CC
ROUT
A2–
IN
A2–
GND
ROUT
A1–
IN
A1–
ROUT
D2–
IN
D2–
GND
ROUT
D1–
IN
D1–
V
CC
ROUT
C2–
IN
C2–
ROUT
C1–
IN
C1–
B
ROUT
B2+
IN
B2+
ROUT
B1+
IN
B1+
V
CC
ROUT
A2+
IN
A2+
GND
ROUT
A1+
IN
A1+
ROUT
D2+
IN
D2+
GND
ROUT
D1+
IN
D1+
V
CC
ROUT
C2+
IN
C2+
ROUT
C1+
IN
C1+
C
TDO
GND
TRST LDTD
EN
V
CC
SPD
SELD
V
CC
GND
DATA
[1]
DATA
[3]
DATA
[5]
DATA
[7]
GND
ULCC ULCD
V
CC
INSELB INSELC TMS TDI
D
TMEN3 SCAN
EN2
V
CC
NC V
CC
ULCB
GND GND
DATA
[0]
DATA
[2]
DATA
[4]
DATA
[6]
GND
SPD
SELC
ULCA
V
CC
INSELA INSELD RESET TCLK
E
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
F
RX
DB[1]
RE
CLKOB
RX
DB[0]
V
CC
V
CC
V
CC
RX
DC[9]
RX
DC[8]
G
RX
DB[3]
SPD
SELA
NC
SPD
SELB
GND GND
WREN
GND
H
GND GND GND GND GND GND GND GND
J
RX
DB[4]
RX
DB[7]
RX
DB[2]
BIST
STB
GND GND GND GND
K
LFIB RX
DB[9]
RX
DB[6]
RX
DB[5]
GND GND
TRG
CLKC–
RX
DC[4]
L
GND
RX
CLKB–
RX
CLKB+
RX
DB[8]
GND
LFIC TRG
CLKC+
RX
DC[5]
M
GND
RE
PDOB
TRG
CLKB–
TRG
CLKB+
RE
PDOC
V
CC
RX
DC[7]
RX
DC[6]
N
GND GND GND GND GND GND GND GND
P
GND GND GND GND
RX
DC[0]
RX
DC[1]
RX
DC[2]
RX
DC[3]
R
V
CC
V
CC
V
CC
V
CC
RX
CLKC–
RX
CLKC+
RE
CLKOC
BIST
STC
T
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
U
RX
DA[0]
BIST
STA
V
CC
RX
DA[4]
V
CC
V
CC
GND GND GND
TRG
CLKD–
ADDR
[0]
GND GND
RX
DD[3]
RX
DD[4]
V
CC
V
CC
V
CC
V
CC
V
CC
V
RX
DA[1]
RX
DA[2]
RX
DA[5]
RX
DA[9]
V
CC
V
CC
GND GND
RE
CLKOA
TRG
CLKD+
ADDR
[2]
BIST
STD
GND
RX
DD[1]
RX
DD[5]
V
CC
RX
DD[8]
V
CC
V
CC
V
CC
W
RX
DA[3]
RX
DA[6]
TRG
CLKA+
LFIA
V
CC
V
CC
GND GND
RE
PDOA
RX
CLKA+
ADDR
[1]
ADDR
[3]
GND
RX
DD[0]
RX
DD[6]
V
CC
RX
CLKD–
LFID
V
CC
V
CC
Y
RX
DA[7]
RX
DA[8]
TRG
CLKA–
RE
PDOD
V
CC
V
CC
GND GND
RX
CLKA–
GND
NC RE
CLKOD
GND
RX
DD[2]
RX
DD[7]
V
CC
RX
CLKD+
RX
DD[9]
V
CC
V
CC
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