User`s manual

36 PRELIMINARY 1M28 and 1M75 User’s Manual
03-32-00525-03 DALSA
Register address 4 - STATUS3_REG
Bit Description
7 Not used = 0
Table 11: Status register 4 (Register address REGADDR = 5D = 05H)
Register address 5 - STATUS4_REG
Bit Description
0 Error in the asynchronous communications transfer
1 CANCEL was active, i.e. read from non defined register
2Not used = 0
3 Not used = 0
4Not used = 0
5 Not used = 0
6Not used = 0
7 Not used = 0
Register address 06H and 07H (Mode register 0 and 1)
Mode registers 0 and 1 control the basic functions of the camera. To ensure proper
operation, these registers are updated first during power-up. The functions of each
individual bit are shown in Tables 12, 13 and 14.
Table 12: Mode register 0 (Register address REGADDR = 6D = 06H)
Register address 6 - MODE0_REG
Bit Name Description Default
0 ENABLE0 Camera on, = 1 Ł Camera in operation 1
1 ENABLE1 Invert Pixel Clock, = 1 Ł phase shift of 180
degrees
0
2 ENABLE2 0
3 ENABLE3
These bits are responsible for resolution, access
to the LUT’s and the LFSR interface test
0
4 EN_TOGGLE = 1 Ł Automatic voltage switching active 1
5 EN_LL2_LOG = 1 Ł LinLog2-response curve active 0
6 LOG = 1 Ł Log response curve on
= 0 Ł Log response curve off
0
7LINLOG = 1 Ł LinLog-response curve on
= 0 Ł LinLog-response curve off
0
Table 13: Camera resolution and special functions
Enable3 Enable2 Function Comment
0 0 8 bit Digital gain x 1
0 1 8 bit
LUT 10-to-8
Two user programmable LUT’s
LUT0 factory preset digital gain x 2
LUT1 factory preset digital gain x 4
1 0 10 bit Digital gain x 1
1 1 10 bit LFSR Interface test with Linear Feedback Shift
Register (LFSR)