User`s manual

42 Part I: PC2-CamLink Board PC2-CamLink User's Manual
Camera Interface
The PC2-CamLink supports the Camera Link™ specification base configuration (one connector, 24-
bit data) and clock rates up to 66 MHz. The Camera Link™ specification also defines medium and full
configurations with two and three connectors as well as a larger data size. The PC2-CamLink does not
support the medium and full configurations. All signal and timing characteristics match the Camera
Link™ specification.
The PC2-CamLink accepts up to 24-bit data in differential format.
The PC2-CamLink is assembled with Camera Link™ LVDS devices.
The PC2-CamLink supports camera data rates up to 66MHz.
The PC2-CamLink accepts single channel (8, 10, 12, 14, 16-bits) and Dual Channel (8, 10, 12-
bits).
The Camera Link™ specification defines the 24-bit input as three bytes: Port A, Port B, and Port C.
Port A is the least significant byte (LSB) and Port C is the most significant byte (MSB). This
assignment is easily understood for 8-bit input. With single tap or single channel cameras, even 10, 12,
and 16-bit inputs are fairly simple. Confusion begins with the assignment of 10-bit and 12-bit 2-tap or
two channel cameras. The Data and Port Assignments Table below shows the data bit assignments for
all three ports.
Data and Port Assignments Table
Port/Bit assignent 8-bit 1–2
tap
10-bit 1
tap
10-bit 2
taps
12-bit 1
tap
12-bit 2
taps
14-bit 1
tap
16-bit 1
tap
Port A
A0 A0 A0 A0 A0 A0 A0 A0
A1 A1 A1 A1 A1 A1 A1 A1
A2 A2 A2 A2 A2 A2 A2 A2
A3 A3 A3 A3 A3 A3 A3 A3
A4 A4 A4 A4 A4 A4 A4 A4
A5 A5 A5 A5 A5 A5 A5 A5
A6 A6 A6 A6 A6 A6 A6 A6
A7 A7 A7 A7 A7 A7 A7 A7
Port B
B0 B0 A8 A8 A8 A8 A8 A8
B1 B1 A9 A9 A9 A9 A9 A9
B2 B2 x x A10 A10 A10 A10
B3 B3 x x A11 A11 A11 A11
B4 B4 x B8 x B8 A12 A12