UM.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Support Worldwide Technical Support and Product Information ni.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Important Information Warranty The NI 6034E, NI 6035E, and NI 6036E devices are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
UM.book Page 4 Monday, May 14, 2001 10:32 AM Compliance FCC/Canada Radio Frequency Interference Compliance* Determining FCC Class The Federal Communications Commission (FCC) has rules to protect wireless communications from interference. The FCC places digital electronics into two classes. These classes are known as Class A (for use in industrial-commercial locations only) or Class B (for use in residential or commercial locations).
UM.book Page 5 Monday, May 14, 2001 10:32 AM Canadian Department of Communications This Class B digital apparatus meets all requirements of the Canadian Interference-Causing Equipment Regulations. Cet appareil numérique de la classe B respecte toutes les exigences du Règlement sur le matériel brouilleur du Canada. Compliance to EU Directives Readers in the European Union (EU) must refer to the Manufacturer's Declaration of Conformity (DoC) for information** pertaining to the CE Mark compliance scheme.
UM.book Page vii Monday, May 14, 2001 10:32 AM Contents About This Manual Conventions Used in This Manual.................................................................................xi Related Documentation..................................................................................................xii Chapter 1 Introduction About the NI 6034E/6035E/6036E Device ...................................................................1-1 Using PXI with CompactPCI.........................................
UM.book Page viii Monday, May 14, 2001 10:32 AM Contents Chapter 4 Connecting Signals I/O Connector ................................................................................................................ 4-1 Analog Input Signal Overview...................................................................................... 4-6 Types of Signal Sources.................................................................................. 4-7 Floating Signal Sources ........................................
UM.book Page ix Monday, May 14, 2001 10:32 AM Contents GPCTR1_SOURCE Signal...............................................................4-37 GPCTR1_GATE Signal....................................................................4-38 GPCTR1_OUT Signal ......................................................................4-39 GPCTR1_UP_DOWN Signal ...........................................................4-39 FREQ_OUT Signal ...........................................................................
UM.book Page xi Monday, May 14, 2001 10:32 AM About This Manual The NI 6034E, NI 6035E, and NI 6036E devices are high-performance multifunction analog, digital, and timing I/O devices for PCI, PXI, and CompactPCI bus computers. Supported functions include analog input, analog output, digital I/O, and timing I/O.
UM.book Page xii Monday, May 14, 2001 10:32 AM About This Manual monospace Text in this font denotes text or characters that you should enter from the keyboard, sections of code, programming examples, and syntax examples. This font is also used for the proper names of disk drives, paths, directories, programs, subprograms, subroutines, device names, functions, operations, variables, filenames and extensions, and code excerpts.
UM.book Page 1 Monday, May 14, 2001 10:32 AM 1 Introduction This chapter describes the NI 6034E/6035E/6036E device, lists what you need to get started, describes the optional software and equipment, and explains how to unpack your NI 6034E/6035E/6036E device. About the NI 6034E/6035E/6036E Device Thank you for buying an NI 6034E/6035E/6036E device.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Chapter 1 Introduction The NI 6034E/6035E/6036E device can interface to an SCXI system— the instrumentation front end for plug-in DAQ devices—so that you can acquire analog signals from thermocouples, RTDs, strain gauges, voltage sources, and current sources. You can also acquire or generate digital signals for communication and control.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Chapter 1 Introduction Table 1-1. Pins Used by the PXI-6035E/6036E PXI E Series Signal PXI Pin Name PXI J2 Pin Number RTSI<0..5> PXI Trigger<0..5> B16, A16, A17, A18, B18, C18 RTSI 6 PXI Star D17 RTSI Clock PXI Trigger 7 E16 Reserved LBL<0..3> C20, E20, A19, C19 Reserved LBR<0..
UM.book Page 4 Monday, May 14, 2001 10:32 AM Chapter 1 Introduction Software Programming Choices When programming your National Instruments DAQ hardware, you can use National Instruments application development environment (ADE) software or other ADEs. In either case, you use NI-DAQ. NI-DAQ NI-DAQ, which shipped with your NI 6034E/6035E/6036E device, has an extensive library of functions that you can call from your ADE. These functions allow you to use all the features of your NI 6034E/6035E/6036E.
UM.book Page 5 Monday, May 14, 2001 10:32 AM Chapter 1 Introduction To download a free copy of the most recent version of NI-DAQ, click Download Software at ni.com. National Instruments ADE Software LabVIEW features interactive graphics, a state-of-the-art interface, and a powerful graphical programming language. The LabVIEW Data Acquisition VI Library, a series of virtual instruments for using LabVIEW with National Instruments DAQ hardware, is included with LabVIEW.
UM.book Page 6 Monday, May 14, 2001 10:32 AM Chapter 1 Introduction For more information about these products, refer to the National Instruments catalog at ni.com/catalog or call the sales office nearest you. Unpacking Your NI 6034E/6035E/6036E device is shipped in an antistatic package to prevent electrostatic damage to the device. Electrostatic discharge can damage several components on the device. Caution Never touch the exposed pins of connectors.
UM.book Page 7 Monday, May 14, 2001 10:32 AM Chapter 1 Introduction Cautions Do not operate the device in an explosive atmosphere or where there may be flammable gases or fumes. Do not operate damaged equipment. The safety protection features built into this device can become impaired if the device becomes damaged in any way. If the device is damaged, turn the device off and do not use it until service-trained personnel can check its safety.
UM.book Page 1 Monday, May 14, 2001 10:32 AM 2 Installing and Configuring Your NI 6034E/6035E/6036E This chapter explains how to install and configure your NI 6034E/6035E/6036E device. Installing Your Software Complete the following steps in order to install your software before installing your NI 6034E/6035E/6036E device. 1. Install your ADE, such as LabVIEW or Measurement Studio, according to the instructions on the CD and the release notes. 2. Install NI-DAQ according to the instructions on the CD.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Chapter 2 Installing and Configuring Your NI 6034E/6035E/6036E Note 4. Remove the expansion slot cover on the back panel of the computer. 5. Ground yourself using a grounding strap or by holding a grounded object. Follow the ESD protection precautions described in the Unpacking section of Chapter 1, Introduction. 6. Insert the NI 6034E/6035E/6036E device into a 5 V PCI slot. Gently rock the device to ease it into place.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Chapter 2 Installing and Configuring Your NI 6034E/6035E/6036E 8. Visually verify the installation. Make sure the device is not touching other devices or components and is fully inserted in the slot. 9. Plug in and turn on your computer. The PXI-6035E/6036E device is now installed. You are now ready to configure your hardware and software.
UM.book Page 1 Monday, May 14, 2001 10:32 AM 3 Hardware Overview This chapter presents an overview of the hardware functions on your NI 6034E/6035E/6036E device.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Chapter 3 Hardware Overview Analog Input The analog input (AI) section of the NI 6034E/6035E/6036E device is software configurable. The following sections describe in detail each of the analog input settings. Input Mode The NI 6034E/6035E/6036E device has three different input modes— nonreferenced single-ended (NRSE) input, referenced single-ended (RSE) input, and differential (DIFF) input. The single-ended input configurations provide up to 16 channels.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Chapter 3 Hardware Overview Input Range The NI 6034E/6035E/6036E device has a bipolar input range that changes with the programmed gain. Each channel may be programmed with a unique gain of 0.5, 1.0, 10, or 100 to maximize the 16-bit analog-to-digital converter (ADC) resolution. With the proper gain setting, you can use the full resolution of the ADC to measure the input signal. Table 3-2 shows the input range and precision according to the gain used.
UM.book Page 4 Monday, May 14, 2001 10:32 AM Chapter 3 Hardware Overview Settling times can also increase when scanning high-impedance signals due to a phenomenon called charge injection, where the analog input multiplexer injects a small amount of charge into each signal source when that source is selected. If the impedance of the source is not low enough, the effect of the charge—a voltage error—will not have decayed by the time the ADC samples the signal.
UM.book Page 5 Monday, May 14, 2001 10:32 AM Chapter 3 Hardware Overview control signals are input only and do not affect the operation of the DIO lines. Timing Signal Routing The DAQ-STC chip provides a flexible interface for connecting timing signals to other devices or external circuitry. The NI 6034E/6035E/6036E uses the RTSI bus to interconnect timing signals between devices, and the Programmable Function Input (PFI) pins on the I/O connector to connect the device to external circuitry.
UM.book Page 6 Monday, May 14, 2001 10:32 AM Chapter 3 Hardware Overview Figure 3-2 shows that CONVERT* can be generated from a number of sources, including the external signals RTSI<0..6> and PFI<0..9> and the internal signals Sample Interval Counter TC and GPCTR0_OUT. Many of these timing signals are also available as outputs on the RTSI pins, as indicated in the RTSI Triggers section in this chapter, and on the PFI pins, as indicated in Chapter 4, Connecting Signals.
UM.book Page 7 Monday, May 14, 2001 10:32 AM Chapter 3 ♦ Hardware Overview PXI-6035E/6036E The RTSI clock connects to other devices through the PXI trigger bus on the PXI backplane. The RTSI clock signal uses the PXI trigger<7> line for this connection. RTSI Triggers The seven RTSI trigger lines on the RTSI bus provide a very flexible interconnection scheme for any device sharing the RTSI bus.
UM.book Page 8 Monday, May 14, 2001 10:32 AM Chapter 3 Hardware Overview DAQ-STC TRIG1 TRIG2 CONVERT* PXI Star<6> UPDATE* GPCTR0_SOURCE PXI Trigger<0..5> RTSI Switch PXI Bus Connector WFTRIG GPCTR0_GATE GPCTR0_OUT STARTSCAN AIGATE SISOURCE UISOURCE GPCTR1_SOURCE GPCTR1_GATE PXI Trigger<7> Switch RTSI_OSC (20 MHz) Figure 3-4.
UM.book Page 1 Monday, May 14, 2001 10:32 AM 4 Connecting Signals This chapter describes how to make input and output signal connections to your NI 6034E/6035E/6036E device using the I/O connector. The I/O connector for the NI 6034E/6035E/6036E device has 68 pins that you can connect to 68-pin accessories with the SH6868 shielded cable or the R6868 ribbon cable. You can connect your device to 50-pin signal accessories with the SH6850 shielded cable or R6850 ribbon cable.
UM.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Table 4-1. Signal Descriptions for I/O Connector Pins Signal Name Reference Direction Description — — Analog Input Ground—These pins are the reference point for single-ended measurements in RSE configuration and the bias current return point for differential measurements. All three ground references—AIGND, AOGND, and DGND—are connected together on your device. ACH<0..
UM.book Page 4 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Table 4-1. Signal Descriptions for I/O Connector Pins (Continued) Signal Name Reference Direction PFI0/TRIG1 DGND Input Output PFI0/Trigger 1—As an input, this signal is one of the Programmable Function Inputs (PFIs). PFI signals are explained in the Connecting Timing Signals section later in this chapter. As an output, this signal is the TRIG1 (AI Start Trigger) signal.
UM.book Page 5 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Table 4-1. Signal Descriptions for I/O Connector Pins (Continued) Signal Name Reference Direction Description PFI8/GPCTR0_SOURCE DGND Input Output PFI8/Counter 0 Source—As an input, this signal is one of the PFIs. As an output, this signal is the GPCTR0_SOURCE signal. This signal reflects the actual source connected to the general-purpose counter 0.
UM.book Page 6 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Table 4-2. I/O Signal Summary for the NI 6034E/6035E/6036E (Continued) Signal Type and Direction Impedance Input/ Output Protection (Volts) On/Off Source (mA at V) Sink (mA at V) Rise Time (ns) Bias VCC DO 0.1 Ω Short-circuit to ground 1A fused — — — DIO<0..7> DIO — Vcc +0.5 13 at (Vcc –0.4) 24 at 0.4 1.1 50 kΩ pu SCANCLK DO — — 3.5 at (Vcc –0.4) 5 at 0.4 1.5 50 kΩ pu EXTSTROBE* DO — — 3.
UM.book Page 7 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Types of Signal Sources When making signal connections, you must first determine whether the signal sources are floating or ground-referenced. The following sections describe these two types of signals. Floating Signal Sources A floating signal source is not connected in any way to the building ground system but, rather, has an isolated ground-reference point.
UM.book Page 8 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Vin+ Programmable Gain Instrumentation Amplifier + + PGIA Vm – Vin– Measured Voltage – Vm = [Vin+ – Vin–]* Gain Figure 4-2. Programmable Gain Instrumentation Amplifier (PGIA) In single-ended mode (RSE and NRSE), signals connected to ACH<0..15> are routed to the positive input of the PGIA. In differential mode, signals connected to ACH<0..7> are routed to the positive input of the PGIA, and signals connected to ACH<8..
UM.book Page 9 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals input multiplexers on the device. The PGIA converts two input signals to a signal that is the difference between the two input signals multiplied by the gain setting of the amplifier. The amplifier output voltage is referenced to the ground for the device. Your device A/D converter (ADC) measures this output voltage when it performs A/D conversions.
UM.book Page 10 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Input Floating Signal Source (Not Connected to Building Ground) Input Examples • Underground Thermocouples • Signal Conditioning with Isolated Outputs • Battery Devices ACH(+) + V 1 – Example • Plug-in Instruments with Nonisolated Outputs ACH(+) + ACH(–) Grounded Signal Source + V 1 – – ACH(–) + – R Differential (DIFF) AIGND AIGND See text for information on bias resistors.
UM.book Page 11 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Differential Connection Considerations (DIFF Input Configuration) A differential connection is one in which the analog input signal has its own reference signal or signal return path. These connections are available when the selected channel is configured in DIFF input mode. In DIFF mode, the analog input channels are paired, with ACH as the signal input and ACH as the signal reference.
UM.book Page 12 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Differential Connections for Ground-Referenced Signal Sources Figure 4-4 shows how to connect a ground-referenced signal source to a channel on the device configured in DIFF input mode.
UM.book Page 13 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Differential Connections for Nonreferenced or Floating Signal Sources Figure 4-5 shows how to connect a floating signal source to a channel configured in DIFF input mode on the NI 6034E/6035E/6036E device.
UM.book Page 14 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals You must reference the source to AIGND. The easiest way is to connect the positive side of the signal to the positive input of the PGIA and connect the negative side of the signal to AIGND as well as to the negative input of the PGIA, without any resistors at all. This connection works well for DC-coupled sources with low source impedance (less than 100 Ω).
UM.book Page 15 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Single-Ended Connection Considerations A single-ended connection is one in which the analog input signal of the NI 6034E/6035E/6036E device is referenced to a ground that can be shared with other input signals. The input signal is tied to the positive input of the PGIA, and the ground is tied to the negative input of the PGIA. When every channel is configured for single-ended input, up to 16 analog input channels are available.
UM.book Page 16 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Single-Ended Connections for Floating Signal Sources (RSE Configuration) Figure 4-6 shows how to connect a floating signal source to a channel configured for RSE mode on the NI 6034E/6035E/6036E device. ACH Floating Signal Source Programmable Gain Instrumentation Amplifier + + Vs PGIA – + Input Multiplexers – AISENSE Measured Voltage Vm – AIGND I/O Connector Selected Channel in RSE Configuration Figure 4-6.
UM.book Page 17 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Figure 4-7 shows how to connect a grounded signal source to a channel configured for NRSE mode on the NI 6034E/6035E/6036E device. ACH+ I/O Connector GroundReferenced Signal Source Programmable Gain Instrumentation Amplifier + Vs + – PGIA ACH– – Vm CommonMode Noise and Ground Potential + Measured Voltage – Input Multiplexers AISENSE + Vcm AIGND – Selected Channel in NRSE Configuration Figure 4-7.
UM.book Page 18 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Connecting Your Analog Output Signals ♦ NI 6035E and NI 6036E only The analog output signals are DAC0OUT, DAC1OUT, and AOGND. DAC0OUT and DAC1OUT are not available on the NI 6034E. DAC0OUT is the voltage output signal for analog output channel 0. DAC1OUT is the voltage output signal for analog output channel 1. AOGND is the ground-referenced signal for both analog output channels and the external reference signal.
UM.book Page 19 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Connecting Digital I/O (DIO) Signals The NI 6034E/6035E/6036E device has digital I/O signals DIO<0..7> and DGND. DIO<0..7> are the signals making up the DIO port, and DGND is the ground-reference signal for the DIO port. You can program all lines individually to be inputs or outputs. Exceeding the maximum input voltage ratings, which are listed in Table 4-2, can damage the NI 6034E/6035E/6036E device and the computer.
UM.book Page 20 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Figure 4-9 shows DIO<0..3> configured for digital input and DIO<4..7> configured for digital output. Digital input applications include receiving TTL signals and sensing external device states such as the switch state shown in the Figure 4-9. Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 4-9.
UM.book Page 21 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals All digital timing connections are referenced to DGND. This reference is demonstrated in Figure 4-10, which shows how to connect an external TRIG1 source and an external CONVERT* source to two PFI pins on the NI 6034E/6035E/6036E device. PFI0/TRIG1 PFI2/CONVERT* TRIG1 Source CONVERT* Source DGND I/O Connector Figure 4-10.
UM.book Page 22 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals As an input, you can individually configure each PFI pin for edge or level detection and for polarity selection, as well. You can use the polarity selection for any of the 13 timing signals, but the edge or level detection depends upon the particular timing signal being controlled. The detection requirements for each timing signal are listed within the section that discusses that individual signal.
UM.book Page 23 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Figure 4-12 shows a typical pretriggered DAQ sequence. The description for each signal shown in these figures is included later in this chapter. TRIG1 TRIG2 Don't Care STARTSCAN CONVERT* Scan Counter 3 2 1 0 2 2 2 1 0 Figure 4-12.
UM.book Page 24 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals EXTSTROBE* Signal EXTSTROBE* is an output-only signal that generates either a single pulse or a sequence of eight pulses in the hardware-strobe mode. An external device can use this signal to latch signals or to trigger events. In the single-pulse mode, software controls the level of the EXTSTROBE* signal. A 10 µs and a 1.2 µs clock are available for generating a sequence of eight pulses in the hardware-strobe mode.
UM.book Page 25 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Figures 4-15 and 4-16 show the input and output timing requirements for the TRIG1 signal. tw Rising-Edge Polarity Falling-Edge Polarity tw= 10 ns minimum Figure 4-15. TRIG1 Input Signal Timing tw tw = 50 to 100 ns Figure 4-16. TRIG1 Output Signal Timing The device also uses the TRIG1 signal to initiate pretriggered DAQ operations. In most pretriggered applications, the TRIG1 signal is generated by a software trigger.
UM.book Page 26 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals acquisition. The scan counter indicates the minimum number of scans before TRIG2 can be recognized. After the scan counter decrements to zero, it is loaded with the number of posttrigger scans to acquire while the acquisition continues. The device ignores the TRIG2 signal if it is asserted prior to the scan counter decrementing to zero.
UM.book Page 27 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals STARTSCAN Signal Any PFI pin can receive as an input the STARTSCAN signal, which is available as an output on the PFI7/STARTSCAN pin. Refer to Figures 4-11 and 4-12 for the relationship of STARTSCAN to the DAQ sequence. As an input, the STARTSCAN signal is configured in the edge-detection mode. You can select any PFI pin as the source for STARTSCAN and configure the polarity selection for either rising or falling edge.
UM.book Page 28 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals tw STARTSCAN tw = 50 to 100 ns a. Start of Scan Start Pulse CONVERT* STARTSCAN toff = 10 ns minimum toff b. Scan in Progress, Two Conversions per Scan Figure 4-20. STARTSCAN Output Signal Timing The CONVERT* pulses are masked off until the device generates the STARTSCAN signal. If you are using internally generated conversions, the first CONVERT* appears when the onboard sample interval counter reaches zero.
UM.book Page 29 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals CONVERT* Signal Any PFI pin can externally input the CONVERT* signal, which is available as an output on the PFI2/CONVERT* pin. Refer to Figures 4-11 and 4-12 for the relationship of CONVERT* to the DAQ sequence. As an input, the CONVERT* signal is configured in the edge-detection mode. You can select any PFI pin as the source for CONVERT* and configure the polarity selection for either rising or falling edge.
UM.book Page 30 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals tw tw = 50 to 150 ns Figure 4-22. CONVERT* Output Signal Timing The sample interval counter on the NI 6034E/6035E/6036E device normally generates the CONVERT* signal unless you select some external source. The counter is started by the STARTSCAN signal and continues to count down and reload itself until the scan is finished. It then reloads itself in preparation for the next STARTSCAN pulse.
UM.book Page 31 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals SISOURCE Signal Any PFI pin can externally input the SISOURCE signal, which is not available as an output on the I/O connector. The onboard scan interval counter uses the SISOURCE signal as a clock to time the generation of the STARTSCAN signal. You must configure the PFI pin you select as the source for the SISOURCE signal in the level-detection mode.
UM.book Page 32 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals As an output, the WFTRIG signal reflects the trigger that initiates waveform generation, even if the waveform generation is being externally triggered by another PFI. The output is an active high pulse with a pulse width of 50 to 100 ns. This output is set to tri-state at startup. Figures 4-24 and 4-25 show the input and output timing requirements for the WFTRIG signal.
UM.book Page 33 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals As an output, the UPDATE* signal reflects the actual update pulse that is connected to the DACs. This is true even if the updates are being externally generated by another PFI. The output is an active low pulse with a pulse width of 300 to 350 ns. This output is set to tri-state at startup. Figures 4-26 and 4-27 show the input and output timing requirements for the UPDATE* signal.
UM.book Page 34 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals UISOURCE Signal Any PFI pin can externally input the UISOURCE signal, which is not available as an output on the I/O connector. The UI counter uses the UISOURCE signal as a clock to time the generation of the UPDATE* signal. You must configure the PFI pin you select as the source for the UISOURCE signal in the level-detection mode. You can configure the polarity selection for the PFI pin for either active high or active low.
UM.book Page 35 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals GPCTR0_SOURCE and configure the polarity selection for either rising or falling edge. As an output, the GPCTR0_SOURCE signal reflects the actual clock connected to general-purpose counter 0, even if another PFI is externally inputting the source clock. This output is set to tri-state at startup. Figure 4-29 shows the timing requirements for the GPCTR0_SOURCE signal. tp tw tw tp = 50 ns minimum tw = 23 ns minimum Figure 4-29.
UM.book Page 36 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals Figure 4-30 shows the timing requirements for the GPCTR0_GATE signal. tw Rising-Edge Polarity Falling-Edge Polarity tw = 10 ns minimum Figure 4-30. GPCTR0_GATE Signal Timing in Edge-Detection Mode GPCTR0_OUT Signal This signal is available only as an output on the GPCTR0_OUT pin. The GPCTR0_OUT signal reflects the terminal count (TC) of general-purpose counter 0.
UM.book Page 37 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals GPCTR0_UP_DOWN Signal This signal can be externally input on the DIO6 pin and is not available as an output on the I/O connector. The general-purpose counter 0 counts down when this pin is at a logic low and count up when it is at a logic high. You can disable this input so that software can control the up-down functionality and leave the DIO6 pin free for general use.
UM.book Page 38 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals GPCTR1_GATE Signal Any PFI pin can externally input the GPCTR1_GATE signal, which is available as an output on the PFI4/GPCTR1_GATE pin. As an input, the GPCTR1_GATE signal is configured in edge-detection mode. You can select any PFI pin as the source for GPCTR1_GATE and configure the polarity selection for either rising or falling edge.
UM.book Page 39 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals GPCTR1_OUT Signal This signal is available only as an output on the GPCTR1_OUT pin. The GPCTR1_OUT signal monitors the TC device general-purpose counter 1. You have two software-selectable output options—pulse on TC and toggle output polarity on TC. The output polarity is software selectable for both options. This output is set to tri-state at startup. Figure 4-34 shows the timing requirements for the GPCTR1_OUT signal.
UM.book Page 40 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals tsc SOURCE tsp VIL tgsu GATE tsp VIH tgh VIH VIL tgw tout OUT VOH VOL Source Clock Period Source Pulse Width Gate Setup Time Gate Hold Time Gate Pulse Width Output Delay Time tsc tsp tgsu tgh tgw tout 50 ns minimum 23 ns minimum 10 ns minimum 0 ns minimum 10 ns minimum 80 ns maximum Figure 4-35.
UM.book Page 41 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals The OUT output timing parameters are referenced to the signal at the SOURCE input or to one of the internally generated clock signals on the NI 6034E/6035E/6036E device. Figure 4-35 shows the OUT signal referenced to the rising edge of a source signal. Any OUT signal state changes occur within 80 ns after the rising or falling edge of the source signal.
UM.book Page 42 Monday, May 14, 2001 10:32 AM Chapter 4 Connecting Signals The following recommendations apply for all signal connections to your NI 6034E/6035E/6036E device: • Separate device signal lines from high-current or high-voltage lines. These lines can induce currents in or voltages on the device signal lines if they run in parallel paths at a close distance.
UM.book Page 1 Monday, May 14, 2001 10:32 AM 5 Calibration This chapter discusses the calibration procedures for the NI 6034E/6035E/6036E device. If you are using the NI-DAQ device driver, that software includes calibration functions for performing all of the steps in the calibration process. Calibration refers to the process of minimizing measurement and output voltage errors by making small circuit adjustments.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Chapter 5 Calibration This method of calibration is not very accurate because it does not take into account the fact that the device measurement and output voltage errors can vary with time and temperature. It is better to self-calibrate when the device is installed in the environment in which it is used.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Chapter 5 Calibration Other Considerations The CalDACs adjust the gain error of each analog output channel by adjusting the value of the reference voltage supplied to that channel. This calibration mechanism is designed to work only with the internal 10 V reference. Thus, in general, it is not possible to calibrate the analog output gain error when using an external reference.
UM.book Page 1 Monday, May 14, 2001 10:32 AM A Specifications This appendix lists the specifications of the NI 6034E/6035E/6036E device. These specifications are typical at 25 °C unless otherwise noted. Analog Input Input Characteristics Number of channels ............................... 16 single-ended or 8 differential (software-selectable per channel) Type of ADC.......................................... Successive approximation Resolution ..............................................
UM.book Page 2 Monday, May 14, 2001 10:32 AM Appendix A Specifications FIFO buffer size......................................512 samples Data transfers ..........................................DMA,interrupts,programmed I/O DMA modes ...........................................Scatter-gather (Single transfer, demand transfer) Configuration memory size ....................
UM.book Page 3 Monday, May 14, 2001 10:32 AM Appendix A Specifications Amplifier Characteristics Input impedance Normal powered on ........................ 100 GΩ in parallel with 100 pF Powered off..................................... 820 Ω Overload.......................................... 820 Ω Input bias current ................................... ±200 pA Input offset current................................. ±100 pA CMRR (DC to 60 Hz) Gain 0.5, 1.0....................................
UM.book Page 4 Monday, May 14, 2001 10:32 AM Appendix A Specifications Stability Recommended warm-up time.................15 min Offset temperature coefficient Pregain.............................................±20 µV/°C Postgain ...........................................±175 µV/°C Gain temperature coefficient ..................±20 ppm/°C Analog Output ♦ NI 6035E/6036E only Output Characteristics Number of channels................................2 voltage Resolution NI 6035E ........................
UM.book Page 5 Monday, May 14, 2001 10:32 AM Appendix A Specifications Offset Temp Drift NI 6036E Accuracy Information Absolute Accuracy Nominal Range (V) % of Reading Positive FS Negative FS 24 Hours 90 Days 1 Year (mV) (%/ °C) 10 –10 0.0089 0.0109 0.0131 1102.94 0.0005 Transfer Characteristics Relative accuracy (INL) after calibration NI 6035E......................................... ±0.3 LSB typ, ±0.5 LSB max NI 6036E.........................................
UM.book Page 6 Monday, May 14, 2001 10:32 AM Appendix A Specifications Voltage Output Range ......................................................±10 V Output coupling ......................................DC Output impedance...................................0.1 Ω max Current drive...........................................±5 mA max Protection................................................Short-circuit to ground Power-on state (steady state) NI 6035E .........................................
UM.book Page 7 Monday, May 14, 2001 10:32 AM Appendix A Specifications Noise NI 6035E......................................... 200 µVrms, DC to 400 kHz NI 6036E......................................... 110 µVrms, DC to 400 kHz Midscale transition glitch Magnitude NI 6035E.................................. ±12 mV NI 6036E.................................. ±10 mV Duration NI 6035E.................................. 2.0 µs NI 6036E.................................. 1.
UM.book Page 8 Monday, May 14, 2001 10:32 AM Appendix A Specifications Power-on state.........................................Input (High-Z), 50 kΩ pull up to +5 VDC Data transfers ..........................................Programmed I/O Timing I/O Number of channels................................2 up/down counter/timers, 1 frequency scaler Resolution Counter/timers .................................24 bits Frequency scalers ............................4 bits Compatibility ..............................
UM.book Page 9 Monday, May 14, 2001 10:32 AM Appendix A Specifications RTSI Trigger lines ........................................... 7 Calibration Recommended warm-up time ................ 15 minutes Interval ................................................... 1 year External Calibration reference ............... > 6 and < 10 V Onboard calibration reference Level ............................................... 5.000 V (±3.
UM.book Page 10 Monday, May 14, 2001 10:32 AM Appendix A Specifications ♦ PXI-6035E/6036E only Functional Shock ....................................MIL-T-28800 E Class 3 (per Section 4.5.5.4.1) Half-sine shock pulse, 11 ms duration, 30 g peak, 30 shocks per face Operational random vibration.................5 to 500 Hz, 0.31 grms, 3 axes Non-operational random vibration .........5 to 500 Hz, 2.
UM.book Page 11 Monday, May 14, 2001 10:32 AM Appendix A Specifications For full EMC compliance, you must operate this device with shielded cabling. In addition, all covers and filler panels must be installed. See the Declaration of Conformity (DoC) for this product for any additional regulatory compliance information. To obtain the DoC for this product, click Declaration of Conformity at ni.com/hardref.nsf/. This Web site lists the DoCs by product family.
UM.book Page 1 Monday, May 14, 2001 10:32 AM B Custom Cabling and Optional Connectors This appendix describes the various cabling and connector options for the NI 6034E/6035E/6036E device. Custom Cabling NI offers cables and accessories for you to prototype your application or to use if you frequently change device interconnections.
UM.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Appendix B Custom Cabling and Optional Connectors Figure B-2 shows the pin assignments for the 50-pin E Series connector. This connector is available when you use the SH6850 or R6850 cable assemblies.
UM.book Page 1 Monday, May 14, 2001 10:32 AM C Common Questions This appendix contains a list of commonly asked questions and their answers relating to usage and special features of your NI 6034E/6035E/6036E device. General Information What is the DAQ-STC? The DAQ-STC is the system timing control application-specific integrated circuit (ASIC) designed by NI and is the backbone of the NI 6034E/6035E/6036E device. The DAQ-STC contains seven 24-bit counters and three 16-bit counters.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Appendix C Common Questions What type of 5 V protection does the NI 6034E/6035E/6036E device have? The NI 6034E/6035E/6036E device has 5 V lines equipped with a self-resetting 1 A fuse. Installation and Configuration How do I set the base address for the NI 6034E/6035E/6036E device? The base address of the NI 6034E/6035E/6036E device is assigned automatically through the PCI/PXI bus protocol. This assignment is completely transparent to you.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Appendix C Common Questions I am using the DACs to generate a waveform, but I discovered with a digital oscilloscope that there are glitches on the output signal. Is this normal? When it switches from one voltage to another, any DAC produces glitches due to released charges. The largest glitches occur when the most significant bit (MSB) of the D/A code switches.
UM.book Page 4 Monday, May 14, 2001 10:32 AM Appendix C Common Questions Timing and Digital I/O What types of triggering can be hardware-implemented on my NI 6034E/6035E/6036E device? Digital triggering is hardware-supported on the NI 6034E/6035E/6036E device. Do the counter/timer applications that I wrote previously work with the DAQ-STC? If you are using NI-DAQ with LabVIEW, some of your applications drawn using the CTR VIs do still run.
UM.book Page 5 Monday, May 14, 2001 10:32 AM Appendix C Common Questions function the connected signal serves. Use the Route Signal VI to enable the PFI lines to output internal signals. If you enable a PFI line for output, do not connect any external signal source to it; if you do, you can damage the device, the computer, and the connected equipment.
UM.book Page 1 Monday, May 14, 2001 10:32 AM Technical Support Resources D Web Support NI Web support is your first stop for help in solving installation, configuration, and application problems and questions. Online problem-solving and diagnostic resources include frequently asked questions, knowledge bases, product-specific troubleshooting wizards, manuals, drivers, software updates, and more. Web support is available through the Technical Support section of ni.com.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Appendix D Technical Support Resources Worldwide Support NI has offices located around the world to help address your support needs. You can access our branch office Web sites from the Worldwide Offices section of ni.com. Branch office Web sites provide up-to-date contact information, support phone numbers, e-mail addresses, and current events.
UM.
UM.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Glossary CH channel—pin or wire lead to which you apply or from which you read the analog or digital signal. Analog signals can be single-ended or differential. For digital signals, you group channels to form ports. Ports usually consist of either four or eight digital channels. channel clock the clock controlling the time interval between individual channel sampling within a scan. Devices with simultaneous sampling do not have this clock.
UM.
UM.book Page 5 Monday, May 14, 2001 10:32 AM Glossary F FIFO first-in first-out memory buffer—the first data stored is the first data sent to the acceptor. FIFOs are often used on DAQ devices to temporarily store incoming or outgoing data until that data can be retrieved or output. For example, an analog input FIFO stores the results of A/D conversions until the data can be retrieved into system memory, a process that requires the servicing of interrupts and often the programming of the DMA controller.
UM.book Page 6 Monday, May 14, 2001 10:32 AM Glossary GPCTR0_UP_DOWN general purpose counter 0 up down GPCTR1_GATE general purpose counter 1 gate signal GPCTR1_OUT general purpose counter 1 output signal GPCTR1_SOURCE general purpose counter 1 clock source signal GPCTR1_UP_DOWN general purpose counter 1 up down grounded measurement system See referenced single-ended configuration.
UM.
UM.book Page 8 Monday, May 14, 2001 10:32 AM Glossary N NI-DAQ National Instruments driver software for DAQ hardware noise an undesirable electrical signal—Noise comes from external sources such as the AC power line, motors, generators, transformers, fluorescent lights, soldering irons, CRT displays, computers, electrical storms, welders, radio transmitters, and internal sources such as semiconductors, resistors, and capacitors. Noise corrupts signals you are trying to send or receive.
UM.
UM.book Page 10 Monday, May 14, 2001 10:32 AM Glossary R referenced single-ended configuration RSE—all measurements are made with respect to a common reference measurement system or ground; also called a grounded measurement system relative accuracy a measure in LSB of the accuracy of an ADC. It includes all non-linearity and quantization errors. It does not include offset and gain errors of the circuitry feeding the ADC.
UM.book Page 11 Monday, May 14, 2001 10:32 AM Glossary scan one or more analog or digital input samples. Typically, the number of input samples in a scan is equal to the number of channels in the input group. For example, one pulse from the scan clock produces one scan which acquires one new sample from every analog input channel in the group. scan clock the clock controlling the time interval between scans.
UM.book Page 12 Monday, May 14, 2001 10:32 AM Glossary TTL transistor-transistor logic—a digital circuit composed of bipolar transistors wired in a certain manner two’s complement given a number x expressed in base 2 with n digits to the left of the radix point, the (base 2) number 2n - x U UI update interval UISOURCE update interval counter clock signal update the output equivalent of a scan. One or more analog or digital output samples.
UM.book Page 13 Monday, May 14, 2001 10:32 AM Glossary VOL volts, output low Vrms volts, root mean square W waveform multiple voltage readings taken at a specific sampling rate WFTRIG waveform generation trigger signal working voltage the highest voltage that should be applied to a product in normal use, normally well under the breakdown voltage for safety margin. See also breakdown voltage.
UM.
UM.book Page 2 Monday, May 14, 2001 10:32 AM Index connectors. See I/O connectors.
UM.book Page 3 Monday, May 14, 2001 10:32 AM Index FREQ_OUT signal description (table), 4-5 general-purpose timing signal connections, 4-41 I/O signal summary (table), 4-6 frequently asked questions. See questions and answers.
UM.
UM.
UM.
UM.
UM.book Page 8 Monday, May 14, 2001 10:32 AM Index V timing I/O connections (figure), 4-21 waveform generation timing connections UISOURCE signal, 4-34 UPDATE* signal, 4-32 to 4-33 WFTRIG signal, 4-31 to 4-32 timing I/O common questions, C-4 to C-5 specifications, A-8 timing signal routing CONVERT* signal routing (figure), 3-5 device and RTSI clocks, 3-6 to 3-7 programmable function inputs, 3-6 RTSI triggers, 3-7 to 3-8 TRIG1 signal, 4-24 to 4-25 TRIG2 signal, 4-25 to 4-26 triggers.
