DAQ DAQ Hardware Overview Guide DAQ Hardware Overview Guide January 2000 Edition Part Number 370097A-01
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Contents About This Guide Conventions ...................................................................................................................xiii MIO and AI Device Terminology ...................................................................xvi Related Documentation..................................................................................................xviii Chapter 1 MIO and AI Devices MIO and AI Multifunction I/O Devices .............................................................
Contents Chapter 3 LPM Devices LPM Device Analog Input ............................................................................................ 3-1 LPM Device Data Acquisition ........................................................................ 3-1 LPM Device Data Acquisition Timing............................................. 3-2 LPM Device Data Acquisition Rates................................................ 3-3 LPM Device Digital I/O .............................................................
Contents Chapter 8 DIO-96 Digital I/O Devices DIO-96 Digital I/O.........................................................................................................8-1 DIO-96 Groups................................................................................................8-2 Chapter 9 DIO-24 (6503), AT-MIO-16DE-10, and 6025E Devices DIO-24 (6503), AT-MIO-16DE-10, and 6025E Digital I/O .........................................9-1 DIO-24 (6503), AT-MIO-16DE-10, and 6025E Device Groups.............
Contents SCC-DO01 Isolated Digital Output Module................................................... 13-5 SCC Configuration ........................................................................................................ 13-5 Chapter 14 SCXI Hardware SCXI Installation and Configuration............................................................................. 14-2 SCXI Operating Modes .................................................................................................
Contents Chapter 15 VXI-DAQ Devices RTSI...............................................................................................................................15-1 VXI-DIO-128 Digital I/O Device..................................................................................15-2 VXI-AO-48XDC Analog Output Device ......................................................................15-2 VXI-AO-48XDC Digital I/O...........................................................................
Contents Chapter 19 NI 40XX Devices NI 40XX Device Input ................................................................................................... 19-1 NI 40XX Data Acquisition............................................................................................. 19-2 NI 40XX Data Acquisition Filtering and Timing .......................................................... 19-2 Chapter 20 DSA Devices PCI-445X and NI 455X Devices................................................................
Contents Glossary Index Figures Figure 2-1. Figure 2-2. Lab and 1200 Device Interval Counter Block Diagram........................2-7 Lab and 1200 Devices Counter/Timer Signal Connections ..................2-8 Figure 3-1. LPM Device Counter/Timer Signal Connections .................................3-4 Figure 4-1. Figure 4-2. DAQCard-700 Counter/Timer Signal Connections ..............................4-4 516 Devices and DAQCard-500 Counter/Timer Signal Connections .......................................
Contents Table 11-1. Table 11-2. Table 11-3. Analog Input Channel Range................................................................ 11-1 AMUX-64T Channel Numbers............................................................. 11-2 AMUX-64T Scanning Order for Each MIO or AI Device Input Channel........................................................................................ 11-3 Table 13-1. SCC-AI Series Module Input/Output Range, Gain, and Bandwidth .... 13-3 Table 15-1.
About This Guide The DAQ Hardware Overview Guide is for users of the NI-DAQ software for PC compatibles version 6.7. NI-DAQ software is a powerful application programming interface (API) between your data acquisition (DAQ) application and your National Instruments DAQ devices. Conventions The following conventions appear in this guide: This icon denotes a note, which alerts you to important information.
About This Guide 671X device Refers to the DAQCard-6715, PCI-6711, PXI-6711, PCI-6713, and PXI-6713. AI device These analog input devices are listed in Table 1. bold Bold text denotes items that you must select or click on in the software, such as menu items and dialog box options. Bold text also denotes parameter names. DAQCard-500/700 Refers to the DAQCard-500 and DAQCard-700. DIO 6533 Refers to the AT-DIO-32HS, PCI-DIO-32HS, DAQCard-6533, and PXI-6533.
About This Guide MIO-64 Refers to the AT-MIO-64E-4, PCI-6031E, PCI-6071E, VXI-MIO-64E-1, and VXI-MIO-64XE-10. monospace Text in this font denotes text or characters that you should enter from the keyboard, sections of code, programming examples, and syntax examples. This font is also used for the proper names of disk drives, paths, directories, programs, subprograms, subroutines, device names, functions, operations, variables, filenames and extensions, and code excerpts.
About This Guide SCXI digital module Refers to the SCXI-1160, SCXI-1161, SCXI-1162, SCXI-1162HV, SCXI-1163, and SCXI-1163R. Simultaneous sampling device Refers to the PCI-6110E, PCI-6111E, PCI-4451, PCI-4452, NI 4551, and NI 4552. VXI-MIO device Refers to the VXI-MIO-64E-1 and VXI-MIO-64XE-10. VXI-SC-1102/B/C Refers to the VXI-SC-1102, VXI-SC-1102B, and VXI-SC-1102C. MIO and AI Device Terminology This guide uses generic terms to describe groups of devices whenever possible.
About This Guide Table 1.
About This Guide Table 1.
1 MIO and AI Devices This chapter contains overview information on the MIO and AI devices. These devices are listed in Table 1-1. MIO and AI Multifunction I/O Devices The National Instruments MIO and AI devices are collectively known as E Series devices. Timing and control on these devices is performed by the National Instruments Data Acquisition System Timing Controller (DAQ-STC) chip.
Chapter 1 MIO and AI Devices Table 1-1. MIO and AI Multifunction I/O Device Analog Input Characteristics (Continued) Number of Channels ADC Resolution (Bits) Gains Range (V) Input FIFO (Words) PCI-MIO-16E-4, PCI-MIO-16E-1, PXI-6040E, PXI-6070E 16 12 0.5, 1, 2.5, 5, 10, 20, 50, 100, ±5, 0 to 10 512 yes DAQCard-AI-16E-4 16 12 0.
Chapter 1 MIO and AI Devices Table 1-1. MIO and AI Multifunction I/O Device Analog Input Characteristics (Continued) Number of Channels ADC Resolution (Bits) Gains DAQCard-6023E 16 12 DAQCard-6024E 16 DAQCard-6062E 16 Device Range (V) Input FIFO (Words) Hardware Analog Trigger 0.5, 1, 10, 100 ±5 2048 no 12 0.5, 1, 10, 100 ±5 2048 no 12 0.5, 1, 2, 5, 10, 20, 50, 100 ±5 8192 yes Note Terms such as ADC resolution and analog trigger are defined in the Glossary.
Chapter 1 MIO and AI Devices You can combine both single-channel and multiple-channel acquisition with any of the following additional modes: • Posttrigger mode • Pretrigger mode • Double-buffered mode • AMUX-64T mode • SCXI mode Note The 611X devices do not support the AMUX-64T or SCXI modes. Posttrigger mode collects a specified number of samples after the device receives a trigger.
Chapter 1 MIO and AI Devices You can use SCXI modules as a data acquisition front end for the device to condition the input signals and multiplex the channels. You can use all the modes just described in conjunction with SCXI. The SCXI Modules and Compatible DAQ Devices section in Chapter 14, SCXI Hardware, describes how to use the SCXI functions to set up the SCXI modules for a data acquisition to be performed by a DAQ device.
Chapter 1 MIO and AI Devices • A conversion signal initiates individual analog-to-digital (A/D) conversions. This signal can be supplied from the onboard programmable sample timer, externally through a selected I/O connector pin, through a RTSI bus trigger line, or by software. • A stop trigger is a signal used for pretriggered data acquisition to notify your device to stop acquiring data after a specified number of scans.
Chapter 1 MIO and AI Devices rateNotSupportedError. This typically occurs if you specified a timebase of 5 (100 Hz) and a sample interval of 100, for example, for a resulting sample interval of 1 s. This generates an error because the sample interval counter rolls over before 1 s. Note The 611X devices use the scan interval counter to control the acquisition rate. The sample interval counter does not affect conversion timing since all channels are sampled simultaneously.
Chapter 1 MIO and AI Devices output channels depend on the value of the numbers in the buffer, the level of the reference voltage, and the polarity setting. Note (E Series devices on VXI, ISA, PCI, PXI and 1394 buses only) NI-DAQ can use either DMA or interrupt service routines to generate waveforms on the analog output channels. By default, NI-DAQ uses DMA because DMA is simply more efficient.
Chapter 1 MIO and AI Devices E Series Digital I/O The E Series devices contain one 8-bit digital I/O port supplied by the DAQ-STC chip. This port is referred to as port 0 by the Digital I/O functions. You can configure the entire digital port as either an input or an output port, or you can configure individual lines for either input or output. The port has read-back capability. This port operates in nonlatched mode only.
Chapter 1 MIO and AI Devices E Series Counter/Timer Operation The E Series devices use the National Instruments DAQ-STC counter/timer chip. The DAQ-STC has two 24-bit counter/timers that are always available for general-purpose counter/timer applications. Refer to the GPCTR functions in the NI-DAQ Function Reference Online Help for more information.
Lab and 1200 Devices 2 This chapter contains overview information on the DAQCard-1200, DAQPad-1200, Lab-PC+, Lab-PC-1200, Lab-PC-1200AI, PCI-1200, and SCXI-1200 devices. Lab and 1200 Devices Analog Input The Lab and 1200 devices contain eight single-ended analog input channels numbered 0 through 7. The analog input channels are multiplexed into a single programmable gain stage and 12-bit ADC. The devices have gains of 1, 2, 5, 10, 20, 50, and 100.
Chapter 2 Lab and 1200 Devices Lab and 1200 Devices Data Acquisition The Lab and 1200 devices can perform single-channel data acquisition and multiple-channel scanned data acquisition. For single-channel data acquisition, you select a single analog input channel and gain setting. The device performs a single A/D conversion on that channel every sample interval. For multiple-channel scanned data acquisition, the devices scan a sequence of analog input channels.
Chapter 2 Lab and 1200 Devices depends on the length of the user-specified buffer and on the number of samples specified to be acquired after receipt of the trigger. Because there is only one EXTTRIG input on the device I/O connector, a single acquisition cannot employ both of these trigger modes. Double-buffered mode, like pretrigger mode, also fills the user-specified buffer continuously.
Chapter 2 Lab and 1200 Devices Data acquisition timing involves the following timing signals: • A start trigger is an edge-triggered signal that initiates a data acquisition sequence. You can supply a trigger pulse either externally through the I/O connector EXTTRIG input or from software control. You can enable a hardware start trigger by calling the DAQ function DAQ_Config or specifying trigger mode in the AI_Start.vi or AI_Trigger_Config.vi.
Chapter 2 Lab and 1200 Devices interrupt on every sample and interrupt on half-FIFO. When using external conversions, you should select the mode appropriate for the acquisition rate. See the Set_DAQ_Device_Info function in the NI-DAQ Function Reference Online Help or the Set_DAQ_Device_Info.vi in the LabVIEW DAQ Online Reference to set the interrupt generation mode.
Chapter 2 Lab and 1200 Devices Lab and 1200 Devices Waveform Generation The Waveform Generation functions can continuously write values to either one or both analog output channels using an onboard or external clock to update the DACs at regular intervals. The values are contained in a buffer that you allocate and fill. The resultant voltages produced at the analog output channels depend on the value of the integer numbers in the buffer, the level of the reference voltage, and the polarity setting.
Chapter 2 Lab and 1200 Devices Lab and 1200 Devices Interval Counter/Timer Operation Figure 2-1 diagrams the available 16-bit counters. CLOCK Counter OUT GATE Figure 2-1. Lab and 1200 Device Interval Counter Block Diagram Each counter has a clock input, a gate input, and an output. You can use a counter to count the falling edges of the signal applied to the CLK input. The Lab and 1200 devices use the counter gate input to gate counting operations.
Chapter 2 Lab and 1200 Devices GATB2 CLKB2 OUTB2 GATB1 CLKB1 OUTB1 CLKB0 I/O Connector Figure 2-2 shows the connections of the 8253-B Counter/Timer signals to the device I/O connector. OUTB0 GATB0 8253 Counter/Timer Group B 2 MHz Source Figure 2-2. Lab and 1200 Devices Counter/Timer Signal Connections Each counter has a clock input, a gate input, and an output labeled CLK, GAT, and OUT, respectively.
Chapter 2 Lab and 1200 Devices As with all interrupt-driven operations, you can exceed the ability of your system to handle the interrupt traffic if you increase your analog input sampling rate or analog output update rate beyond your system’s capability. To determine the limits of your system, start at lower rates and gradually increase them until your computer operations begin to slow down.
3 LPM Devices This chapter contains overview information on the PC-LPM-16 and PC-LPM-16PnP. LPM Device Analog Input The LPM devices contain 16 multiplexed, single-ended analog input channels numbered 0 through 15. The analog input channels are driven into a 12-bit, self-calibrating ADC. The devices have no gains on the analog input.
Chapter 3 LPM Devices channel 0 is reached and the scan begins anew with the starting channel. If the starting channel is channel 3, for example, the scan sequence is as follows: channel 3, channel 2, channel 1, channel 0, channel 3, and so on You can use both the single-channel and multiple-channel acquisitions with the double-buffered mode. Double-buffered mode fills the user-specified buffer continuously. You can call the NI-DAQ function DAQ_DB_Transfer or the LabVIEW AI_Read.vi or AI_Buffer_Read.
Chapter 3 LPM Devices LPM Device Data Acquisition Rates Table 3-1 shows the maximum recommended data acquisition rates. Table 3-1. Maximum Recommended Data Acquisition Rates for the LPM Devices Maximum Acquisition Rate (kS/s) Sample Interval (µs) Single-channel scan 50 20 Multiple-channel scan (0 to +5 V, −2.5 to +2.
Chapter 3 LPM Devices LPM Device Counter/Timers The LPM devices contain an onboard MSM82C53 Programmable Interval Timer chip that has three independent 16-bit counter/timers. NI-DAQ uses the three counter/timers from the 82C53 as follows: • Counter 0 is used for data acquisition operations. • Counter 1 is available for counting/timing operations.
4 516 Devices and DAQCard-500/700 Devices This chapter contains overview information on the DAQCard-500, DAQCard-516, DAQCard-700, and PC-516. 516 Devices and DAQCard-500/700 Analog Input The DAQCard-500 provides eight multiplexed, single-ended analog input channels. The DAQCard-700 provides 16 multiplexed, single-ended or eight multiplexed differential analog input channels. The analog input channels for both are driven into a 12-bit ADC. Neither device has gains on the analog input.
Chapter 4 516 Devices and DAQCard-500/700 Devices 516 Devices and DAQCard-500/700 Data Acquisition The 516 devices and DAQCard-500/700 can perform single-channel data acquisition and multiple-channel scanned data acquisition. For single-channel data acquisition, you select a single analog input channel. The device performs a single A/D conversion on that channel every sample interval. For multiple-channel scanned data acquisition, the device scans a sequence of analog input channels.
Chapter 4 516 Devices and DAQCard-500/700 Devices are not available on the I/O connector for the 516 devices and DAQCard-500. • Counter 1 is available for general-purpose counting functions. • Counter 2 is available for general-purpose counting functions. Data acquisition timing involves the following timing signals: • A conversion pulse is a signal that generates a pulse once every sample interval, causing the device to initiate an A/D conversion.
Chapter 4 516 Devices and DAQCard-500/700 Devices 516 Devices and DAQCard-500/700 Interval Counter/Timer Operation This section describes the operation of the 516 devices and the DAQCard-500/700 interval counter/timer operation. DAQCard-700 Counter/Timers The DAQCard-700 contains an onboard MSM82C54 Programmable Interval Timer chip that has three independent 16-bit counter/timers. NI-DAQ uses the three counter/timers from the 82C54 as follows: • Counter 0 is used for data acquisition operations.
Chapter 4 516 Devices and DAQCard-500/700 Devices connector. The inverted OUT1 signal is also available on the DAQCard-700 I/O connector. 516 Devices and DAQCard-500 Counter/Timers The 516 devices and DAQCard-500 contain an onboard MSM82C54 Programmable Interval Timer chip that has three independent 16-bit counter/timers. NI-DAQ uses the three counter/timers from the 82C54 as follows: • Counter 0 is used for data acquisition operations. • Counter 1 is available for counting/timing operations.
5 AT-AO-6/10 Analog Output Devices This chapter contains overview information on the AT-AO-6/10 analog output devices, including the AT-AO-6 and the AT-AO-10. AT-AO-6/10 Analog Output The AT-AO-6 and AT-AO-10 contain six or 10 analog output channels, respectively. Each analog output channel contains a 12-bit DAC. The DACs are double buffered, which facilitates accurate waveform generation via the delayed update mode.
Chapter 5 AT-AO-6/10 Analog Output Devices generate continuous waveform. Thus, no interrupt service or DMA operation is required to transfer more data to the FIFO. The following conditions must be satisfied to use FIFO mode waveform generation: • The waveform buffer fits in the DAC FIFO. • Double-buffered waveform generation mode is disabled. • The number of iterations is equal to 0 (continuous). Note This mode is available for group 1 only.
Chapter 5 AT-AO-6/10 Analog Output Devices AT-AO-6/10 Digital I/O The AT-AO-6/10 contains eight bits of digital I/O. These bits are divided into a set of two digital I/O ports of four bits each. The 4-bit digital I/O ports are labeled as ports DIOA and DIOB. These ports are referred to as ports 0 and 1 by the Digital I/O functions, in which: • Port DIOA = port 0 • Port DIOB = port 1 You can configure port 0 or 1 as either an input or an output port.
6 6703/6704 Devices This chapter contains overview information on the PCI-6703, PCI-6704, PXI-6703, and PXI-6704 analog output devices. PCI/PXI-6703/6704 Analog Output Devices The 6703 and 6704 devices are precise DC setpoint analog output devices. The 6704 devices contain 16 voltage outputs plus 16 separate current outputs for a total of 32 analog output channels with 16-bit DAC resolution. Each channel is independently programmable.
7 PC-TIO-10 Timing I/O Device This chapter contains overview information on the PC-TIO-10 timing I/O device. PC-TIO-10 Counter/Timer Operation This section describes the operation of the counter/timer chips in the PC-TIO-10 device. Am9513-Based Device Counter/Timer Operation The PC-TIO-10 contains two Advanced Micro Devices (AMD) Am9513 System Timing Controller (STC) chips, each of which provides five independent 16-bit counter/timers and a 4-bit programmable frequency output, FOUT.
Chapter 7 PC-TIO-10 Timing I/O Device inputs for counting operations. The Am9513 also makes available five internal timebases that any counter can use: • 1 MHz clock (1 µs resolution) • 100 kHz clock (10 µs resolution) • 10 kHz clock (100 µs resolution) • 1 kHz clock (1 ms resolution) • 100 Hz clock (10 ms resolution) In addition, you can program the counter to use the output of the next lower-order counter as a signal source. This arrangement is useful for cascading-counters.
Chapter 7 • PC-TIO-10 Timing I/O Device High-Level Gate N–1 Gating—the counter is active when the gate input of the next lower-order counter is at high-logic state. Otherwise, the counter is suspended. Counter operation starts and stops relative to the selected timebase. When you configure a counter for no gating, the counter starts at the first timebase/source edge (rising or falling, depending on the selection) after the software configures the counter.
Chapter 7 PC-TIO-10 Timing I/O Device 1 units = timebase period Timebase Starting Signal TC Toggle Output TC Pulse Output Positive Negative Positive 1 1 Negative 0 < sync period < 1 Figure 7-2. Am9513 Counter Timing and Output Types Figure 7-2 represents a counter generating a delayed pulse and demonstrates the four forms the output pulse can take given the four different types of output signals supported.
Chapter 7 PC-TIO-10 Timing I/O Device Programmable Frequency Output Operation The Am9513-based devices have a 4-bit programmable frequency output signal. This signal is a divided-down version of the selected timebase. You can select any of five internal timebases, counter SOURCE inputs, and counter GATE inputs as the FOUT source. See the CTR_FOUT_Config function in the NI-DAQ Function Reference Online Help or the CTR_Control.vi in the LabVIEW DAQ Online Reference for FOUT use and timing.
Chapter 7 PC-TIO-10 Timing I/O Device Table 7-1. PC-TIO-10 Adjacent Counter Sequence Counter Number Upper Adjacent Counter Lower Adjacent Counter 1 2 5 2 3 1 3 4 2 4 5 3 5 1 4 6 7 10 7 8 6 8 9 7 9 10 8 10 1 9 PC-TIO-10 Digital I/O The PC-TIO-10 device contains 16 bits of digital I/O. These bits are divided into a set of two digital I/O ports of eight bits each. The digital I/O ports are labeled as ports A and B on the I/O connector as shown in the PC-TIO-10 User Manual.
8 DIO-96 Digital I/O Devices This chapter contains overview information on the DIO-96 digital I/O devices, including the PC-DIO-96, PC-DIO-96PnP, PCI-DIO-96, DAQPad-6507, DAQPad-6508, and PXI-6508. DIO-96 Digital I/O The DIO-96 devices contain 96 bits of digital I/O. These bits are divided into a set of 12 digital I/O ports of eight bits each. Digital I/O on this device is controlled by four Intel 8255A Parallel Peripheral Interface chips.
Chapter 8 DIO-96 Digital I/O Devices Table 8-1.
9 DIO-24 (6503), AT-MIO-16DE-10, and 6025E Devices This chapter contains overview information on the DIO-24 (PC-DIO-24, PC-DIO-24PnP, DAQCard-DIO-24, 6503 devices), AT-MIO-16DE-10, and 6025E digital I/O devices. DIO-24 (6503), AT-MIO-16DE-10, and 6025E Digital I/O The DIO-24 (6503), AT-MIO-16DE-10, and 6025E devices contain 24 bits of digital I/O. These bits are divided into a set of three digital I/O ports of eight bits each.
Chapter 9 DIO-24 (6503), AT-MIO-16DE-10, and 6025E Devices Note As discussed in Chapter 1, MIO and AI Devices, the AT-MIO-16DE-10 and 6025E devices also contain eight additional bits of digital I/O called port 0. The AT-MIO-16DE-10 and 6025E devices do not have a port 1. DIO-24 (6503), AT-MIO-16DE-10, and 6025E Device Groups You can group ports PA and PB together to make up a 16-bit port.
10 DIO-32F and 6533 Digital I/O Devices This chapter contains overview information on the DIO-32F and 6533 digital I/O devices, including the AT-DIO-32F, AT-DIO-32HS, PCI-DIO-32HS, DAQCard-6533, and PXI-6533. DIO-32F and 6533 Digital I/O Devices The DIO-32F and 6533 provide 32 bits of bidirectional I/O, in addition to extra input and output lines that differ from device to device. The 32 bidirectional I/O lines are divided into four digital I/O ports of eight bits each.
Chapter 10 DIO-32F and 6533 Digital I/O Devices and ACK2 as extra outputs, in which case they functions as OUT1 through OUT4 lines. Refer to your hardware user manual for the locations of these lines on the I/O connector. You can configure ports 0 through 3 for both handshaking and no-handshaking modes. To configure the ports for handshaking mode, you must assign the ports to one of two handshaking groups. The digital I/O connector has handshaking lines for the groups.
Chapter 10 DIO-32F and 6533 Digital I/O Devices Table 10-2. 6533 Extra Inputs and Outputs Bit Number 6533 Line Used Input Operation 6533 Line Used Output Operation 7 to 4 None None 3 REQ2 (IN4) ACK2 (OUT4) Ignore this bit number if group 2 is configured for handshaking. 2 REQ1 (IN3) ACK1 (OUT3) Ignore this bit number if group 1 is configured for handshaking. 1 STOPTRIG2 (IN2) PCLK2 (OUT2) Ignore this bit number if group 2 is configured for handshaking.
11 AMUX-64T External Multiplexer Accessory This chapter contains overview information on the AMUX-64T accessory. AMUX-64T External Multiplexer Accessory An AMUX-64T external multiplexer accessory expands the number of analog input signals that the MIO or AI device can measure. The AMUX-64T has 16 separate four-to-one analog multiplexer circuits. One AMUX-64T accessory can multiplex up to 64 analog input signals.
Chapter 11 AMUX-64T External Multiplexer Accessory channel numbering of the second device can be from 64 through 127 (single-ended), or from 64 through 95 (differential). Therefore, single-ended and differential channels always begin at the same number on each device. When you use more than one AMUX-64T accessory, address the channels on the different devices, as shown in Table 11-2. Table 11-2.
Chapter 11 AMUX-64T External Multiplexer Accessory AMUX-64T accessory B are multiplexed together into MIO or AI device channel 0. Notice that the MIO or AI device scans the first four channels on accessory A, followed by the first four channels on accessory B. If four AMUX-64T devices are attached to the MIO or AI device, you must scan 16 AMUX-64T channels for every MIO or AI device input channel.
Chapter 11 AMUX-64T External Multiplexer Accessory Table 11-3.
Chapter 11 AMUX-64T External Multiplexer Accessory Note The MIO-64 devices have onboard analog input channels that are numbered as follows: 0 through 63, in single-ended mode 0 through 7, 16 through 23, 32 through 39, and 48 through 55, in differential mode If you plan to use the AMUX-64T with any of these devices, the AMUX-64T channel numbers overlap with the onboard channels.
SC-204X Accessories 12 This chapter contains overview information on the SC-2040, SC-2042-RTD, and SC-2043-SG. SC-2040 Track-and-Hold Accessory The SC-2040 simultaneously amplifies and samples up to eight differential inputs and sends them in parallel as differential signals to an E Series DAQ device. The SC-2040 has eight amplifiers, each with a DIP-switch programmable gain of 1, 10, 100, 200, 300, 500, 600, 700, or 800.
Chapter 12 SC-204X Accessories SC-2042-RTD Accessory The SC-2042-RTD is a low-cost input accessory that connects directly to RTDs and provides current source excitation and RTD input signal routing to the Lab and 1200 Series devices, and the MIO and AI E Series devices. The SC-2042-RTD has eight channels, each of which has one current excitation source (1 mA) and differential input signal routing to the DAQ device.
SCC Series Modules 13 This chapter contains overview information on SCC modules. Signal Conditioning Components (SCCs) are used with a shielded carrier that connects to your 68-pin E Series device for conditioning I/O signals on a per channel basis. Currently, SCC modules are available for voltage attenuation, isolation, current input, strain gauge, and thermocouple input to your E Series device. SCCs are also available for optically isolating digital I/O signals.
Chapter 13 SCC Series Modules or from an external 5 V source. If external 7–42 VDC power is preferred, you can use the SCC-PWR03 option. Finally, for high-power requirements (>2 W), you can use the SCC-PWR02 option. SCC Series Modules SCCs are available for voltage attenuation, isolation, current input, strain gauge, and thermocouple input to your E Series device. A feedthrough SCC allows direct connection to the analog input or analog output signals.
Chapter 13 SCC Series Modules Each version of the SCC-AI series modules is used for measuring signals within specific ranges, as shown in Table 13-1. Table 13-1. SCC-AI Series Module Input/Output Range, Gain, and Bandwidth Model Input Range Output Range Gain Bandwidth SCC-AI01 ±42 V ±8.4 V 0.2 10 kHz SCC-AI02 ±20 V ±10 V 0.
Chapter 13 SCC Series Modules quarter-bridge setups. The SCC-SG03 works with half-bridge setups. The SCC-SG04 works with full-bridge setups. The SCC-SG11 is a shunt calibration module. It contains two shunt calibration circuits you connect across your bridge setups where you want to perform shunt calibration. The circuits are controlled by an E Series digital output channel DIO(X).
Chapter 13 SCC Series Modules SCC-DI01 Isolated Digital Input Module The SCC-DI01 is a single-channel optically isolated digital input module. You can sense digital levels up to 30 VDC. Because the SCC-DI01 is optically isolated, you can decouple the noise and harsh ground of the PC from the real-world signals and vice versa. SCC-DO01 Isolated Digital Output Module The SCC-DO01 is a single-channel, optically isolated digital output module.
14 SCXI Hardware This chapter contains overview information on SCXI hardware. The information in this chapter is modified by information in the VXI-DAQ Signal Conditioning section of the VXI-DAQ chapter and the SCXI section of the PXI chapter. Note In this chapter, the term Lab and 1200 Device does not include the DAQPad-1200.
Chapter 14 SCXI Hardware Please refer to the SCXI Modules and Compatible DAQ Devices section later in this chapter for information about the functionality of each DAQ device with each type of SCXI module. SCXI Installation and Configuration To install your SCXI system, follow the instructions in your SCXI hardware manual.
Chapter 14 SCXI Hardware If you use the SCXI-1200 DAQ module in multiplexed mode, it also has access to the multiplexed output of all analog input modules in the chassis that are operated in multiplexed mode. If you use an MIO or AI device, Lab or 1200 device (except for the DAQPad-1200), or an SCXI-1200 DAQ module, you can multiplex all the analog input channels in the SCXI chassis to one onboard channel dynamically during a timed acquisition.
Chapter 14 SCXI Hardware SCXI-1200 with the input channels from other analog input modules in the chassis during the same scanning operation. You cannot use the SCXI-1200 to read channels from other analog input modules that are configured for parallel mode. Multiplexed Mode for Analog Output Modules The SCXI-1124 analog output module supports only multiplexed mode (sometimes referred to as serial mode in the SCXI-1124 User Manual).
Chapter 14 SCXI Hardware must be sure to enter the correct device numbers in the Connected to field of Measurement & Automation Explorer for each module you operate in parallel mode. By default, when a module operates in parallel mode, the module sends its channel 0 output to analog input channel 0 of the DAQ device, the channel 1 output to analog input channel 1 of the DAQ device, and so on. You cannot use an SCXI-1200 to read channels from another analog input module in parallel mode.
Chapter 14 SCXI Hardware If you are using a DIO-96, AT-MIO-16DE-10, or 6025E device, you can also operate a digital module in parallel mode using the digital ports on the second half of the ribbon cable—pins 51 through 100. Therefore, the DIO-96 can operate two digital modules in parallel mode—one module using the first half of the ribbon cable, pins 1 through 50, and another module using the second half of the ribbon cable, pins 51–100.
Chapter 14 SCXI Hardware multiplex their input channels and send them on the analog bus on the SCXI backplane. So, if you configure the SCXI-1200 for multiplexed mode, you can use it to read the multiplexed output from other SCXI analog input modules in the chassis. In addition, you can multiplex the analog input channels on the SCXI-1200 with the input channels from other analog input modules in the chassis during the same scanning operation.
Chapter 14 SCXI Hardware The SCXI-1300 and SCXI-1303 terminal blocks that you can use with the SCXI-1100 module each have an onboard temperature sensor that is jumper configurable to be either multiplexed with the other input channels (MTEMP configuration), or to be sent directly to a different DAQ device channel (DTEMP configuration). In the MTEMP configuration, you can select the temperature sensor in software using the SCXI_Single_Chan_Setup function.
Chapter 14 SCXI Hardware other 32 input channels during a hardware-controlled scan. On each channel, including CJTEMP, the SCXI-1102 has a 3-pole lowpass filter with a 2 Hz cutoff frequency to reject 60 Hz noise. Each of the 32 differential analog input channels, but not CJTEMP, also has an amplifier with a selectable gain of 1 or 100, selected through the SCXI_Set_Gain function. The amplification and filtering occur before multiplexing.
Chapter 14 SCXI Hardware also has an amplifier with a fixed gain of 100. The amplification and filtering occur before multiplexing. SCXI-1120, SCXI-1120D, and SCXI-1121 The SCXI-1120, SCXI-1120D, and SCXI-1121 are 8-channel and 4-channel isolation modules, respectively. The input voltage range on all three modules is ±5 V. The modules have a hardware-selectable gain on each input channel with values of 1, 2, 5, 10, 20, 50, 100, 200, 250, 500, 1,000, and 2,000 for the SCXI-1120 and SCXI-1121.
Chapter 14 SCXI Hardware SCXI_Calibrate_Setup function to check your bridge circuit. The SCXI-1327 terminal block has DIP switch configurable attenuators that can divide the input signals applied to the SCXI-1120 or SCXI-1121 by 100. You use the SCXI_Scale function to compensate for the attenuation when you scale your binary data to voltage.
Chapter 14 SCXI Hardware If you are measuring RTDs, you can configure the SCXI-1122 for four-wire scanning mode, which means that the module will switch the current excitation source to drive one of the channels 8 through 15 as an excitation output channel whenever the corresponding input channel 0 through 7 is selected. In this mode the module has 8 analog input channels and 8 corresponding current excitation channels.
Chapter 14 SCXI Hardware function: 1 Hz, 40 Hz, 320 Hz, and 1 kHz. Use the SCXI_Set_Threshold function to select the level and offset for a hysteresis setting. The SCXI-1126 has an onboard EEPROM that contains a set of factory-calibration constants for the amplifier on the module. NI-DAQ automatically reads these constants and uses them in the SCXI_Scale function to compensate for amplifier gain and offset errors when scaling binary data to frequency.
Chapter 14 SCXI Hardware the DAQ device, from an external source connected to a pin on the front connector of the module, or from a trigger line on the SCXIbus. The SCXI-1140 track/hold setup is software-configurable for single-channel operations or for interval-scanning operations. During single-channel operations, an SCXI function call can put the module into hold mode before AI functions acquire the data, and put the module back into track mode to sense new input values.
Chapter 14 SCXI Hardware The SCXI-1141, SCXI-1142, and SCXI-1143 have a software-selectable calibration mode that you can select with the SCXI_Calibrate_Setup function. You can ground each input of each amplifier so that you can read the amplifier offsets. The SCXI-1141, SCXI-1142, and SCXI-1143 also have an onboard EEPROM that contains a set of factory gain adjustment calibration constants for each amplifier on the module.
Chapter 14 SCXI Hardware chassis, you do not need to cable the SCXI-1124 to anything; NI-DAQ will communicate with the module using the SCXIbus backplane. In this case, the MIO/DIO jumpers on the module are irrelevant. If you plan to use analog input SCXI modules in addition to the SCXI-1124, and you are not using an SCXI-1200 DAQ module, you should cable one of the analog input modules to the DAQ device.
Chapter 14 SCXI Hardware SCXI-1162 and SCXI-1162HV The SCXI-1162 and SCXI-1162HV are 32-channel optically isolated digital input modules. They accept 32 input signals from external equipment and condition the signals for input to a DAQ device while maintaining optical isolation from the host computer. The SCXI-1162 accepts 0 to +5 V digital signals; the SCXI-1162HV senses AC or DC signals up to 250 V.
Chapter 14 SCXI Hardware The module powers up with its digital output lines in a high state or its relays open. Calling SCXI_Reset also sets all the digital output lines to a high state. The SCXI-1163 and SCXI-1163R modules support both multiplexed (or serial) mode and parallel mode. You must set jumpers on the module correctly for multiplexed or parallel mode. If you cable an MIO or AI device, or Lab or 1200 device to the SCXI-1163 or SCXI-1163R, you must set jumpers on the module to the MIO position.
Chapter 14 SCXI Hardware input gain within the allowable range of X0.8 to X25. Use SCXI_Set_Excitation to set the excitation level and frequency. The allowable level settings are 1 Vrms and 3 Vrms. The allowable frequency settings are 2.5, 3.3, 5, or 10 kHz. Use SCXI_Configure_Connection to set the wiring configuration to 4-wire or 5-wire and to enable external synchronization for channels that need their frequency slaved to a master channel.
Chapter 14 SCXI Hardware The following MIO and AI device resources are reserved by SCXI: DAQ Hardware Overview Guide • The E Series devices use digital I/O lines 0, 1, 2, and 4 for communication with SCXI. Other digital I/O lines are available for Digital I/O functions and you can configure them for either input or output on an individual basis. • When you use an SCXI-1140 module, the scan interval counter on the MIO or AI device controls the track/hold state of the module.
Chapter 14 SCXI Hardware Lab and 1200 Devices (Except Parallel Port Devices) These DAQ devices support the following analog input functionality when using the SCXI analog input modules: • Single-channel analog input using the analog input functions described in Chapter 3, Software Overview, of the NI-DAQ User Manual for PC Compatibles. • Single-channel data acquisition using the data acquisition functions described in Chapter 3, Software Overview, of the NI-DAQ User Manual for PC Compatibles.
Chapter 14 SCXI Hardware cannot read the temperature sensor on the SCXI-1320 terminal block if the SCXI-1320 is in the DTEMP configuration. • The SCXI-1121 module drives analog input channels 0 to 3, even if you are operating the module in multiplexed mode. In addition, if the temperature sensor on the terminal block is in the DTEMP configuration, the SCXI-1121 also drives analog input channel 4.
Chapter 14 SCXI Hardware When you cable a DIO-96 to an SCXI-1162, SCXI-1162HV, SCXI-1163, or SCXI-1163R in parallel mode, the lines in DIO-96 ports 0 to 3 are directly connected to the channels on the module. If you configure the module for parallel (secondary) mode and cable the second half of the ribbon cable to the module, DIO-96 ports 6 to 9 are directly connected to the digital channels on the module.
Chapter 14 SCXI Hardware access the SCXI-1162, SCXI-1162HV, SCXI-1163, or SCXI-1163R channels in parallel mode by using the correct onboard port numbers. You cannot cable a DIO-32F or 6533 device to an analog input module. DAQ Hardware Overview Guide 14-24 www.ni.
15 VXI-DAQ Devices This chapter contains overview information on VXI-DAQ devices, including the VXI-DIO-128, VXI-AO-48XDC, VXI-SC-1102, VXI-SC-1102B, VXI-SC-1102C, VXI-SC-1150, VXI-MIO-64E-1, and VXI-MIO-64XE-10. National Instruments VXI-DAQ devices are in many respects similar to their plug-in counterparts, but they have higher performance and more features. They provide a high-end solution for applications that demand larger channel counts and greater throughput.
Chapter 15 VXI-DAQ Devices Note Unpredictable behavior can result if other VXIbus devices simultaneously use the same VXIbus trigger line the VXI-MIO devices are using to synchronize their operations. VXI-DIO-128 Digital I/O Device The VXI-DIO-128 is a 128-channel parallel digital I/O module for the VXIbus. The module uses eight 16-bit programmable peripheral interfaces (PPIs) that can be subdivided further into 16 8-bit ports. Four 82C55 PPI chips control 64 open-drain output channels.
Chapter 15 VXI-DAQ Devices values for all the analog output channels. All analog channels are guaranteed to be at their power-on values 5 ms after deassertion of system reset. VXI-AO-48XDC Digital I/O The VXI-AO-48XDC contains 32 lines of digital I/O. These lines are divided into four ports of 8 lines each. These four ports are referred to as ports 0 through 3 by the digital I/O functions. You can program each of these ports on a line basis; you can configure each line individually for input or output.
Chapter 15 VXI-DAQ Devices You can interface the VXI-MIO Series modules to an SCXI signal conditioning and multiplexing system to acquire over 3,000 analog signals from thermocouples, RTDs, strain gauges, voltage sources, and current sources. You can also acquire or generate digital signals for communication and control. The digital I/O signals are DIO<0..7> and DGND. DIO<0..7> are the signals making up the DIO port, and DGND is the ground reference signal for the DIO port.
Chapter 15 VXI-DAQ Devices specify the chassis ID and module number of the VXI-SC-1000 and VXI-SC submodule, exactly as if you were communicating with a traditional SCXI chassis. VXI-SC-1102 Submodule The hardware features of this module are identical to those of the SCXI-1102. See the SCXI-1102, SCXI-1102B, and SCXI-1102C section of Chapter 14, SCXI Hardware, for more details. VXI-SC-1102B and the VXI-SC-1102C Submodules The VXI-SC-1102B and the VXI-SC-1102C are variants of the VXI-SC-1102.
16 PXI DAQ Devices This chapter contains overview information on PXI DAQ hardware. RTSI On a PXI chassis the RTSI bus is implemented with PXI trigger bus lines. Each trigger bus line connects to all the PXI slots. The following table shows the mapping between the RTSI bus line (identifier) and the corresponding PXI trigger bus line. Table 16-1.
Chapter 16 PXI DAQ Devices PXI DAQ Signal Conditioning The PXI-1010 chassis has four slots for SCXI modules. You can use these four SCXI slots the same way you would use a traditional (external) SCXI chassis by cabling a DAQ device to one of the SCXI modules. See Chapter 14, SCXI Hardware, for more information. In addition, there is an internal connection between PXI slot 8 and the SCXI bus.
17 NI 5411 Devices This chapter contains overview information on the NI 5411 arbitrary waveform generator devices for ISA and PCI. NI 5411 Arbitrary Waveform and Pattern Generator Devices The NI 5411 devices are high-speed arbitrary waveform and pattern generator devices. The NI 5411 is available for the ISA and the PCI buses. NI 5411 devices for both buses are identical in all other respects.
Chapter 17 NI 5411 Devices Table 17-1. NI 5411 Device Characteristics (Continued) Characteristics NI 5411 for ISA and PCI Waveform memory depth ARB mode 2,000,000, 16-bit samples (standard) Direct digital synthesis (DDS) mode 16,384, 16-bit samples Waveform segment size ARB mode 256 samples minimum Memory depth maximum Note: Segment size should be a multiple of 8 samples.
Chapter 17 NI 5411 Devices NI 5411 Device Waveform Generation The NI 5411 for ISA and PCI can generate arbitrary waveforms at the output at the sustained update rate of 40 MHz. The waveforms are first loaded as segments into the waveform memory on the device. Waveforms then can be generated as a sequence of any combination of segments. Because you can loop over the segments and link to any other looped segments, the effective waveform memory becomes even larger.
Chapter 17 NI 5411 Devices wave in the lookup memory. Then, you can change the frequency of that waveform by just sending one instruction. The frequency switching is phase continuous. This mode is extremely useful for very fine resolution function generation. You can generate sine tones up to 16 MHz with a resolution of 10 MHz. Because this mode uses an accumulator, waveform generation loops back to the beginning of the lookup memory after passing through the end of the lookup memory.
Chapter 17 NI 5411 Devices NI 5411 Device Waveform Generation Triggering The NI 5411 devices have four different operational modes that you can set up before starting the waveform generation. Table 17-2. NI 5411 Operational Modes Mode Description Single The waveform described by the user in the sequence list is generated once by going through all the sequence list. Only the start trigger is required.
Chapter 17 NI 5411 Devices NI 5411 Device Feature Settings You can change the following feature settings even when the waveform generation is in process: • Duty cycle of the SYNC output. • Output (relay) to ON or OFF. • Output Impedance to 50 or 75 Ω. • Switching the analog filter ON or OFF. • Switching the digital filter ON or OFF. Note Refer to the AO_Change_Parameter function description in the NI-DAQ Function Reference Online Help for more information on setting these features.
18 NI 435X Devices This chapter contains overview information on the NI 435X devices, including the NI 4350 for ISA, USB, and PCMCIA, and the NI 4351 for PCI and PXI. For more detailed descriptions of the hardware functionality and specifications, see the NI 4350/4351 User Manual. Also, the 435X instrument driver software documentation contains detailed information on how to write programs to control the 435X device for making measurements.
Chapter 18 NI 435X Devices switch on the ground-referencing, CH− is referenced to analog ground through a 10 MΩ internal resistance. If you switch on open-thermocouple detection, CH+ is connected to +2.5 V through a weak pull-up of 10 MΩ internal resistance. You can set ground-referencing and open-thermocouple detection on a per channel basis. Table 18-1 summarizes the analog input ranges for the 435X devices. Table 18-1. Analog Input Ranges for the 435X Devices Range Volts Analog Input ±0.625 ±1.
Chapter 18 NI 435X Devices Table 18-2. Ranges for 435X Device Data Acquisition (Continued) Notch Frequency (Hz) Number of Channels Reading Rate (Hz) Harmonics of Noise Frequencies Filtered (Hz) 10 N>1 2.8 10 50 N>1 8.8 50 60 N>1 9.7 60 You can scan any combination of channels in any order. You can also scan the same channel multiple times in the scan sequence. An example sequence follows: channel 7, channel 3, channel 0, channel 3, channel 7, channel 5, channel 6, channel 4.
Chapter 18 NI 435X Devices NI 435X Current Source The NI 435X device has a built-in 25 µA current source (exact value stored on board). You can use it to provide excitation to RTDs, thermistors, and other resistors. Use the ohms mode to make measurements using the current source. NI 4351 devices also have an addition 1 mA current source for more accurate measurements with RTDs. NI 435X Digital I/O The NI 4350 for PCMCIA has one 4-bit digital port.
19 NI 40XX Devices This chapter contains overview information on the NI 40XX devices, including the NI 4050 and NI 4060 instruments. For detailed descriptions of the hardware functionality and specifications on the 4050 and 4060 instruments, see the user manual that shipped with your device. Also, the 40XX instrument driver software documentation contains detailed information on how to write programs to control the 4050 and 4060 devices for making measurements.
Chapter 19 NI 40XX Devices You can measure diode drops of up to 2 V in the diode mode on both 4050 and 4060 devices. On the NI 4050 device, you can also measure AC and DC current by using the optional current shunt accessories. NI 40XX Data Acquisition The NI 4050 device can perform single-channel data acquisition. Before you make an acquisition, you must select the mode, range, and notch filter frequency.
Chapter 19 NI 40XX Devices On the NI 4060, the reading rate is dependent on whether offset compensation (autozero) is used, as shown in Table 19-3. Table 19-3. Relationship between Notch Filter Frequency and Single-Channel Acquisition Rate when AutoZero Is Enabled Notch Filter Frequency (Hz) Single-Channel Acquisition Rate When Autozero is Engaged (S/s) 10 1.4 50 4.4 60 4.9 The NI 4060 acquisition rate also varies based on the number of conversions averaged per measurement.
20 DSA Devices This chapter contains overview information on the DSA PCI-4451, PCI-4452, PCI-4453, PCI-4454, NI 4551, and NI 4552 devices. PCI-445X and NI 455X Devices The 445X and 455X devices feature simultaneously sampled input channels using oversampling delta-sigma modulating ADCs. The PCI-4451, PCI-4453, and NI 4551 also feature simultaneously generated output channels using delta-sigma DACs. The hardware features on these devices are summarized in Table 20-1. Table 20-1.
Chapter 20 DSA Devices PCI-445X and NI 455X Analog Input Channels The 445X and 455X devices contain simultaneously sampled differential analog input channels based on delta-sigma ADCs. These converters use an oversampling and filtering technique to antialias the input signal. The converters produce 16-bit resolution readings. Each channel has software configurable coupling settings. The PCI-4451, PCI-4452, NI 4551, and NI 4552 also has software configurable gain settings.
Chapter 20 DSA Devices Pretrigger mode collects data both before and after the device receives a trigger in posttrigger mode, either through software or by applying a hardware signal. The device collects samples and fills the user-specified buffer without stopping until the device receives the stop trigger signal. Refer to the stop trigger discussion in the data acquisition timing section later in this chapter for details. The device then collects a specified number of samples and stops the acquisition.
Chapter 20 DSA Devices There are two hardware trigger sources—analog or digital. The device can receive the analog trigger from any one of the input channels, even if that channel is not included in the scan list of the acquisition. The analog trigger circuitry generates a trigger when the selected input channel reaches a specified slope and level. If you want a digital trigger, you can configure the device to receive the trigger from the digital I/O connector or from the RTSIbus.
Chapter 20 DSA Devices DSA devices accept data values in a left-justified 32-bit data format. This means that the most significant bits of the data value contain the bits that will be written to the converter. Even though the WFM functions are declared to accept pointers to 16-bit data buffers, you should pass the pointers to 32-bit data buffers for the DSA devices. The DDS clock signal is shared by the input and the output sections of the device.
Chapter 20 DSA Devices NI 455X Digital I/O The NI 455X devices contain four 8-bit digital I/O ports supplied by the DAQ-TIO chip. These ports are referred to as ports 0 through 3 by the Digital I/O functions. You can configure each port entirely as either an input or an output port, or you can configure individual lines for either input or output. Each port and line has read-back capability, and these ports operate in nonlatched mode only.
21 671X Devices This chapter contains overview information on the 671X devices, including the DAQCard-6715, PCI-6711, PCI-6713, PXI-6711, and PXI-6713. For more detailed descriptions of the hardware functionality and specifications, refer to your device user manual. 671X Device Analog Output The 671X devices contain four or eight analog output channels numbered 0 through 7. Each analog output channel contains a 12-bit DAC, which is always configured in bipolar mode.
Chapter 21 671X Devices 671X Waveform Generation Using Onboard Memory All 671X devices support FIFO mode waveform generation. In this mode, waveform data is transferred to the onboard DAC FIFO memory only once. These values are then cycled through to generate the waveform continuously or for a finite number of iterations. No interrupt service or DMA operation is required to transfer more data to the device during waveform generation.
Chapter 21 671X Devices 671X Digital I/O The 671X devices contain one 8-bit digital I/O port supplied by the DAQ-STC chip. This port is referred to as port 0 by the Digital I/O functions. You can configure the entire digital port as either an input or an output port, or you can configure individual lines for either input or output. The port has read-back capability. This port operates in nonlatched mode only.
22 652X Devices This chapter contains overview information on the 652X devices, including the PCI-6527 and PXI-6527. The 652X devices have 48 bits of parallel, isolated digital I/O. These 48 bits are divided into six DIO ports of eight bits each and are referred to as ports 0 through 5 by the DIO functions. It is unnecessary to configure the port directions since the direction of each port is fixed. Output ports on these devices have read-back capabilities.
Technical Support Resources A This appendix describes the comprehensive resources available to you in the Technical Support section of the National Instruments Web site and provides technical support telephone numbers for you to use if you have trouble connecting to our Web site or if you do not have internet access. NI Web Support To provide you with immediate answers and solutions 24 hours a day, 365 days a year, National Instruments maintains extensive online technical support resources.
Appendix A Technical Support Resources Software-Related Resources • Instrument Driver Network—A library with hundreds of instrument drivers for control of standalone instruments via GPIB, VXI, or serial interfaces. You also can submit a request for a particular instrument driver if it does not already appear in the library. • Example Programs Database—A database with numerous, non-shipping example programs for National Instruments programming environments.
Glossary Prefix Meaning Value µ- micro- 10 – 6 m- milli- 10 –3 k- kilo- 10 3 M- mega- 10 6 Numbers/Symbols α temperature coefficient at T = 0 °C ε strain Ω ohm ° degree % percent + plus – minus ± plus or minus > greater than A AC alternating current ACK acknowledge A/D analog-to-digital ADC A/D converter. An electronic device, often an integrated circuit, that converts an analog voltage to a digital number.
Glossary ADC resolution The resolution of the ADC, which is measured in bits. An ADC with 16 bits has a higher resolution, and thus a higher degree of accuracy, than a 12-bit ADC. ADF adapter description file AI analog input AMD Advanced Micro Devices analog trigger A trigger that occurs at a user-selected point on an incoming analog signal. Triggering can be set to occur at a specific level on either an increasing or a decreasing signal (positive or negative slope).
Glossary B background acquisition Data is acquired by a DAQ system while another program or processing routine is running without apparent interruption. base address A memory address that serves as the starting address for programmable registers. All other addresses are located by adding to the base address. BCD binary-coded decimal BIOS basic input/output system bipolar A signal range that includes both positive and negative values (for example, −5 V to +5 V).
Glossary conversion A signal that initiates individual A/D conversions. conversion pulse A signal that generates a pulse once every sample interval, initiating an A/D conversion. conversion time The time required, in an analog input or output system, from the moment a channel is interrogated (such as with a read instruction) to the moment that accurate data is available. counter/timer A circuit that counts external pulses or clock pulses (timing).
Glossary differential input An analog input consisting of two terminals, both of which are isolated from computer ground, whose difference is measured. digital port See port. DIN Deutsche Industrie Norme DIO digital I/O DLL Dynamic-link library. A software module in Microsoft Windows containing executable code and data that can be called or used by Windows applications or other DLLs.
Glossary F FIFO A first-in first-out memory buffer; the first data stored is the first data sent to the acceptor. FIFOs are often used on DAQ devices to temporarily store incoming or outgoing data until that data can be retrieved or output. For example, an analog input FIFO stores the results of A/D conversions until the data can be retrieved into system memory, a process that requires the servicing of interrupts and often the programming of the DMA controller.
Glossary IDE Integrated Development Environment IEEE Institute of Electrical and Electronics Engineers interrupt A computer signal indicating that the CPU should suspend its current task to service a designated activity.
Glossary M MB megabytes of memory MIO multifunction I/O MS million samples multiplexed mode an SCXI operating mode in which analog input channels are multiplexed into one module output so that your cabled DAQ device has access to the module’s multiplexed output as well as the outputs on all other multiplexed modules in the chassis through the SCXI bus. Also called serial mode.
Glossary P paging A technique used for extending the address range of a device to point into a larger address space. parallel mode a type of SCXI operating mode in which the module sends each of its input channels directly to a separate analog input channel of the device to the module PC personal computer PCI peripheral component interconnect. A high-performance expansion bus architecture originally developed by Intel to replace ISA and EISA.
Glossary remote SCXI An SCXI configuration in which a serial port cable is connected to an SCXI-2000 chassis or an SCXI-100X chassis with an SCXI-2400 remote communications module. Multiple remote SCXI units can be connected to one serial port in a PC by using RS-485. You can use either an RS-485 interface card in your PC or an RS-485 converter on the RS-232 port. REQ request signal resolution The smallest signal increment that can be detected by a measurement system.
Glossary sample interval An interval that indicates the time to elapse between A/D conversions on each channel in the sequence. sample-interval timer A counter that you can use for conversion timing. sample-interval timer timebase A signal used by the sample interval timer for conversion timing. This signal is only used when the sample interval timer is used. scan counter A counter used to control the number of scans you acquire. scan interval pulse A signal that generates a pulse every scan.
Glossary stop trigger A signal used for pretriggered data acquisition to notify your device to stop acquiring data after a specified number of samples or scans. synchronous (1) Hardware—A property of an event that is synchronized to a reference clock. (2) Software—A property of a function that begins an operation and returns only when the operation is complete. T TC terminal count timebase clock A clock signal that is the time base for the sample-interval counter.
Index Numbers gating modes, 7-2 to 7-3 internal timebases, 7-2 PC-TIO-10 counter/timers, 7-5 to 7-6 adjacent counter sequence (table), 7-6 programmable frequency output operation, 7-5 timebases, 7-2 timing and output types (figure), 7-4 AMUX-64T external multiplexers, 11-1 to 11-5 analog input channel range (table), 11-1 channel numbers (table), 11-2 numbering of analog input channels (notes), 11-5 port unavailability with connection to SCXI chassis or E Series device (note), 1-9 purpose and use, 11-1 to 1
Index C MIO and AI multifunction devices, 1-1 to 1-7 analog input characteristics (table), 1-1 to 1-3 E Series data acquisition, 1-3 to 1-5 NI 40XX device, 19-1 to 19-2 NI 435X device, 18-1 to 18-3 PCI-445X and NI-455X devices, 20-2 to 20-4 data acquisition, 20-2 to 20-3 data acquisition timing, 20-3 to 20-4 analog output AT-AO-6/10 devices, 5-1 to 5-2 Lab and 1200 devices, 2-5 to 2-6 MIO and AI multifunction devices, 1-7 to 1-8 E Series waveform generation, 1-8 MIO device waveform generation, 1-7 to 1-8
Index LPM devices, 3-3 NI 435X devices, 18-4 PCI-445X and NI-455X devices, 20-5 to 20-6 PCI/PXI-671X devices, 21-3 PCI/PXI-6703/6704 analog output devices, 6-1 PC-TIO-10 timing I/O device, 7-6 VXI-AO-48XDC analog output device, 15-3 VXI-DIO-128 digital I/O device, 15-2 VXI-MIO-64E-1 multifunction device, 15-3 to 15-4 VXI-MIO-64XE-10 multifunction device, 15-3 to 15-4 DIO-24 digital I/O, 9-1 to 9-2 groups of ports, 9-2 port numbers (table), 9-1 SCXI support, 14-22 to 14-23 DIO-32F and 6533 digital I/O, 10-1
Index G double-buffered mode 516 devices and DAQCard 500/700, 4-2 E Series, 1-4 Lab and 1200 devices, 2-3 LPM devices, 3-2 PCI-445X and NI-455X devices, 20-3 DSA devices, 20-1 to 20-6 analog input channels, 20-2 to 20-4 data acquisition, 20-2 to 20-3 data acquisition timing, 20-3 to 20-4 analog output channels, 20-4 to 20-5 waveform generation, 20-4 to 20-5 counter/timer operation, 20-6 digital I/O, 20-5 to 20-6 hardware features (table), 20-1 gate signal, E Series, 1-6 gating modes, Am9513-based devices
Index L E Series data acquisition rates, 1-7 E Series data acquisition timing, 1-5 to 1-7 analog output E Series waveform generation, using onboard memory, 1-8 MIO device waveform generation, 1-7 to 1-8 E Series counter/timer operation, 1-10 E Series digital I/O, 1-9 MIO device analog output, 1-7 to 1-8 SCXI support, 14-19 to 14-20 terminology (table), xvi-xviii multiple-channel scanned data acquisition 516 devices and DAQCard 500/700, 4-2 E Series, 1-3 Lab and 1200 devices, 2-2 LPM devices, 3-1 to 3-2 NI
Index PC-TIO-10 timing I/O device adjacent counter sequence (table), 7-6 counter/timer operation Am9513-based operation, 7-1 to 7-5 counter/timers, 7-5 to 7-6 programmable frequency output operation, 7-5 digital I/O, 7-6 PFI pins E Series, 1-10 PCI/PXI-671X devices, 21-3 ports 516 devices and DAQCard 500/700, 4-3 652X devices, 22-1 AT-AO-6/10 devices, 5-3 AT-MIO-16DE-10 and 6025E device ports (table), 1-9 DIO-24, AT-MIO-16DE-10, and 6025E, 9-1 to 9-2 groups of ports, 9-2 port numbers (table), 9-1 DIO-32F a
Index scan counter, E Series, 1-5 scan timer, E Series, 1-5 scan timer timebase signal, E Series, 1-6 scan-interval pulse signal, Lab and 1200 devices, 2-4 SCC Series devices, 13-1 to 13-5 components, 13-2 to 13-5 configuration, 13-5 overview, 13-1 SCC-A10 voltage attenuator module, 13-2 SCC-AI Series isolated analog input module, 13-2 to 13-3 SCC-C120 current input component, 13-3 SCC-DI01 isolated digital input component, 13-5 SCC-DO01 isolated digital output component, 13-5 SCC-FT01 feedthrough/breadboa
Index SCXI-1530 module, 14-18 SCXI-1531 module, 14-18 SCXI-1540 module, 14-18 to 14-19 signal conditioning PXI DAQ devices, 16-2 VXI-DAQ devices, 15-4 to 15-5 Signal Conditioning Components. See SCC Series devices.
Index PCI-4451, PCI-4453, and NI 4551 devices, 20-4 to 20-5 PCI/PXI-671X devices, 21-1 using onboard memory AT-AO-6/10 devices, 5-1 to 5-2 E Series, 1-8 PCI/PXI-671X devices, 21-2 Web support from National Instruments, A-1 to A-2 online problem-solving and diagnostic resources, A-1 software-related resources, A-2 Worldwide technical support, A-2 signal conditioning, 15-4 to 15-5 VXI-DIO-128 digital I/O device, 15-2 VXI-MIO-64E-1 and VXI-MIO-64XE-10 multifunction devices, 15-3 to 15-4 VXI-SC-1102 submodule
