Programming instructions

Chapter 24 Generating a Square Pulse or Pulse Trains
LabVIEW Data Acquisition Basics Manual 24-14
© National Instruments Corporation
Figure 24-17 shows the physical connections to produce a finite pulse train
on the OUT pin of a counter.
counter
generates the finite pulse train with
high-level gating.
counter-1
provides
counter
with a long enough gate
pulse to output the number of desired pulses. You must externally connect
the OUT pin of the
counter-1
to the GATE pin of
counter
. You also can
gate
counter-1
.
Figure 24-17.
Physical Connections for Generating a Finite Pulse Train
DAQ-STC, Am9513
Figure 24-18 shows the diagram of the Finite Pulse Train-Easy
(DAQ-STC) VI located in
labview\examples\daq\counter\
DAQ-STC.llb
. You can also use the example Finite Pulse Train-Easy
(9513) VI located in
labview\examples\daq\counter\Am9513.llb
.
These examples show how to use the Easy counter VI, Generate Pulse
Train, to generate a finite pulse train. With this VI you can specify the
number of pulses, frequency, duty cycle, and pulse polarity of your pulse
train. The Wait+(ms) VI is used as a delay before the counters are reset. The
Intermediate VI, Counter Stop, is called twice to stop the counters.
Figure 24-18.
Diagram of Finite Pulse Train-Easy (DAQ-STC) VI