Datasheet

DTM65536B
2 GB - 240-Pin DDR2 Low Power FB-DIMM
Document 06038, Revision A, 29-Sep-09, Dataram Corporation © 2010 Page 10
AMB Power Specification (T
A
= 0 to 70 C, Voltage referenced to V
SS
= 0V)
Parameter
Symbol Test Condition
Power
Supply
Value Unit
1.5 V 1600
Idle
Current
IDD_IDLE_0
Single or last FBDIMM: L0 state, idle (0 BW); primary channel
enabled, secondary channel disabled, CKE high; command and
address lines stable, DDR2 SDRAM clock active.
1.8 V 500
mA
1.5 V 2300
Idle
Current
IDD_IDLE_1
First FBDIMM: L0 state, idle (0 BW); primary and secondary
channels enabled, CKE high; command and address lines
stable, DDR2 SDRAM clock active.
1.8 V 500
mA
1.5 V 2900
Active
Power
IDD_ACTIVE_1
Active Power
L0 state, 50% DRAM BW,
67% read, 33% write,
primary and secondary channels
enabled, DRAM clock active, CKE HIGH.
1.8 V 1200
mA
1.5 V 2400
Active
Power
IDD_ACTIVE_2
Active Power, Data Pass Through
L0 state, 50% DRAM BW to downstream
DIMM, 67% read, 33% write, primary and
secondary channels enabled, CKE HIGH,
Command and address lines stable,
DRAM clock active.
1.8 V 500
mA
1.5 V 2300
Training
IDD_TRAINING
Primary and secondary channels enabled; 100% toggle on all
channel lanes; DDR2 SDRAM devices idle (0 BW); CKE HIGH,
command and address lines stable; DDR2 SDRAM clock active.
1.8 V 400
mA