Datasheet

' Unlock the Davis VP2/Vue console serial line using the ATtiny25/45/85
' Torkel M. Jodalen <tmj@bitwrap.no> - http://www.annoyingdesigns.com
' Revised: 2013-10-28
'
' NOTE: The SECURITY_REGISTER_DATA (128-byte security register) is
' defined in the DATA section following the program logic.
$PROG &HFF,&HC1,&HDF,&HFF ' Lock, FuseLow, FuseHigh, FuseExtended
$REGFILE = "ATtiny85.DAT" ' Change as required for ATtiny25/45/85
$HWSTACK = 40
$SWSTACK = 16
$FRAMESIZE = 32
Const CMD_STATUS = &HD7 ' Chip status command
Const CMD_SECURITY = &H77 ' Dump security register command
Const RESPONSE_STATUS = &H8C ' Response to CMD_STATUS
Dim I As Byte ' The infamous loop counter
Dim COMMAND As Byte ' Command byte as received from console
Dim USI_DATA_READY As Bit ' Status flag
' Slave select / chip select
SS Alias PinB.4 ' Use PINB for READ, PORTB for WRITE
Config PortB.4 = Input ' This will be a READ-ONLY pin, read from "SS"
Set PortB.4 ' Make sure WE don't pull PortB.4 low
' Perform the SPI setup using the ATtiny's USI
Set USICR.USIWM0 ' SPI mode
Reset USICR.USIWM1 ' SPI mode
Set USICR.USICS1 ' External clock (clocked by the ATmega128L in the console)
Reset USICR.USICLK ' External clock
Reset USICR.USICS0 ' Positive edge
Set USICR.USIOIE ' Enable counter overflow interrupt
' Enable USI overflow interrupts
On USI_OVF USI_OVERFLOW_INT
Enable USI_OVF
Enable Interrupts
Do
While SS = 1
' Wait for SS low
Wend
' Set up the ATTiny25/45/85 USI for SPI operation (SS has been pulled low)
Config PortB.0 = Input ' PB0 = MOSI
Config PortB.1 = Output ' PB1 = MISO
Config PortB.2 = Input ' PB2 = Clock
' Wait for something to come around
While USI_DATA_READY <> 1
Wend
If COMMAND = CMD_STATUS Then
' Respond to CMD_STATUS
While USI_DATA_READY <> 1
Wend
USIDR = RESPONSE_STATUS
Reset USI_DATA_READY
' NOTE: Code listing continued on next page!
Listing 1: Complete BASCOM-AVR source code listing for the Atmel ATtiny25/45/85. Change the
$REGFILE assignment to indicate the ATtiny model being used (here: ATtiny85).
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