Reference Guide

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1 Statement of Volatility – Dell DR6300, DR4300, DR4300e

Statement of Volatility

Dell DR6300, DR4300, and DR4300e

Dell DR4300, DR4300e and DR6300 contain both volatile and non-volatile (NV) components. Volatile

components lose their data immediately upon removal of power from the component. Non-volatile

components continue to retain their data even after the power has been removed from the component.

Components chosen as user-definable configuration options (those not soldered to the motherboard)

are not included in the Statement of Volatility. Configuration option information (pertinent to options,

such as microprocessors, remote access controllers, and storage controllers) is available by component

separately.

The following NV components are present in the Dell DR4300, DR4300e, and the DR6300 systems.

NOTE: For any questions or additional information that you may need, direct your questions or requests to

your Dell Marketing contact.

Item

Non-Volatile

or Volatile

Quantity

Reference

Designator

Size

Planar

PCH Internal CMOS RAM

Non-Volatile

U_PCH

256 Bytes

BIOS Password

Non-Volatile

U_PCH

16 bytes

BIOS SPI Flash

Non-Volatile

U_SPI_BIOS

16 MB

iDRAC SPI Flash

Non-Volatile

U_IDRAC_SPI

4 MB

BMC EMMC

Non-Volatile

U_EMMC

4 GB

CPU Vcore Regulators

Non-Volatile

U8003, U8043

512 Bytes

Vmem Regulators

Non-Volatile

U8011, U8051

512 Bytes

System CPLD RAM

Volatile

U_CPLD

1 KB

System Memory

Volatile

Up to 12

per CPU

CPU<2:1>_CH<3:0>_

D<2:0>

Up to 32GB per DIMM

Internal USB Key

Non-Volatile

Up to 1

N/A

Varies (not factory installed)

CPU

Volatile

1 or 2

CPU1 / CPU2

Various

iDRAC DDR

Volatile

U_IDRAC_MEM

256MByte

iDRAC

Volatile

U_IDRAC

64 kbyte + registers

2x2.5" Backplane

SEP internal flash

Non-Volatile

U_SEP

Flash:32KB+4KB EEPROM: 2KB

Summary of content (14 pages)

PAGE 1
Statement of Volatility Dell DR6300, DR4300, and DR4300e Dell DR4300, DR4300e and DR6300 contain both volatile and non-volatile (NV) components. Volatile components lose their data immediately upon removal of power from the component. Non-volatile components continue to retain their data even after the power has been removed from the component. Components chosen as user-definable configuration options (those not soldered to the motherboard) are not included in the Statement of Volatility.
PAGE 2
Item Non-Volatile or Volatile Quantity Reference Designator Size Backplane External FRU Non-Volatile 1 U_BP_EEPROM 256 Bytes SEP internal flash Non-Volatile 1 U_SEP Flash:32KB+4KB EEPROM: 2KB Backplane External FRU Non-Volatile 1 U_BP_EEPROM 256 Bytes NVSRAM memory Non-Volatile 1 U_NVSRAM 1 Mb Flash memory Non-Volatile 1 U_FLASH 128 Mb Expander FRU image Non-Volatile 1 U_EXP_EEPROM 512 Bytes BP FRU image Non-Volatile 1 U_BP_EEPROM 256 Bytes NVSRAM memory Non-Volatile
PAGE 3
Item Non-Volatile or Volatile Quantity Reference Designator Size Flash memory Non-Volatile 1 U_FLASH 128 Mb BP FRU image Non-Volatile 1 U_BP_EEPROM 256 Bytes Expander FRU image Non-Volatile 1 U_EXP_EEPROM1 512 Bytes NVSRAM Non-volatile 1 U1033 128KB FRU Non-volatile 1 U1019 256B 1-Wire EEPROM Non-volatile 1 U1004 128B SPD Non-volatile 1 U22 256B SBR Non-volatile 1 U1020 8KB Flash Non-volatile 1 U1031 16MB ONFI Backup Flash Non-volatile 1 U1059 4GB SDRAM
PAGE 4
Item Non-Volatile or Volatile Quantity Reference Designator Size Switch Configuration EEPROM Non-Volatile 1 U2 256B SPI Flash Non-Volatile 1 U2 8Mb MCU Non-Volatile 1 U6 512KB Non-Volatile 1 U_SPI_EEPROM 32Mb Non-Volatile 1 U_SPI_FLASH 32Mb Non-Volatile 1 U_TPM 128 Bytes Non-Volatile 1 U_MSP430 128KB IDSDM Left Ear - R730xd SPI Flash Main Control Panel -R730 SPI Flash TPM Trusted Platform Module (TPM) iDRAC Quick Sync MCU MSP430 4 Statement of Volatility – Dell DR6300,
PAGE 5
Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 6
Item Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 7
Item Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 8
Item Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 9
Item Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 10
How is data input to this memory? How is this memory write protected? How is the memory cleared? PCH Internal CMOS RAM BIOS N/A – BIOS only control 1) Set NVRAM_CLR jumper to clear BIOS configuration settings at boot and reboot system; 2) AC power off system, remove coin cell battery for 30 seconds, replace battery and power back on; 3) restore default configuration in F2 system setup menu. BIOS Password Keyboard N/A Place shunt on J_PSWD_NVRAM jumper pins 2 and 4.
PAGE 11
Item How is data input to this memory? How is this memory write protected? How is the memory cleared? iDRAC iDRAC Firmware NA Power off SEP internal flash I2C interface via iDRAC Program write protect bit Not user clearable Backplane External FRU Programmed at ICT during production.
PAGE 12
Item How is data input to this memory? How is this memory write protected? How is the memory cleared? SEP internal flash I2C interface via iDRAC Program write protect bit Not user clearable Backplane External FRU Programmed at ICT during production. Not WP Cannot be cleared with existing tools available to the customer 12x3.
PAGE 13
Item How is data input to this memory? How is this memory write protected? How is the memory cleared? Flash Pre-programmed before assembly. Can be updated using Dell/LSI tools Not WP. Not visible to Host Processor Cannot be cleared with existing tools available to the customer ONFI Backup Flash FPGA backs up DDR data to this device in case of a power failure Not WP. Not visible to Host Processor Flash can be cleared by powering up the card and allowing the controller to flush the contents to VDs.
PAGE 14
How is data input to this memory? How is this memory write protected? How is the memory cleared? The EEPROM image is preloaded at factory before assembly. Once assembled on the card, data can be entered via PLX Device Editor or PLX EEP DOS based tool. Device can be write protected via hardware pin. Alternatively, device contents can be write protected via WPEN bit in status register. System is not functional as intended if corrupted/removed.