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GPIO ON DELL EMBEDDED BOX PC 5000
The Dell Embedded Box PC 5000 provides 16 General Purpose I/O (GPIO) pins organized into two groups of eight pins:
 GPIO 8 IN (GPI0 to GPI7) for input
 GPIO 8 OUT (GPO0 to GPO7) for output.
The pins are located on the front panels of the Embedded Box PC 5000. See Figure 1 for the placements.
Figure 1
The GPIO pins are implemented by an on-board Super IO chip, the Nuvoton NCT6793D. The controller interfaces with the host
processor through the Low Pin Count (LPC) bus.
Depending on the hardware design of the Intel Architecture-based PC, the software accesses the LPC device by reading or writing to
the 2Eh/2Fh or 4Eh/4Fh IO ports.
On the Embedded Box PC 5000, the Super IO chip is accessed through the 2Fh/2Fh IO ports. The Super IO is typically controlled by
the kernel driver or by the BIOS. This document describes an alternative approach to control the Super IO in a user space program
which reads and writes the IO ports.
RESERVE THE IO RANGE FOR CALLER PROCESS
Before the user-space program can access any ports, it has to gain the permission to do so. This is done by calling the ioperm function
before any I/O port can be accessed. The call of ioperm requires the program to have root privileges – you can either run the program
as the root user or make it setuid root.
See the source code example shown below. It gives access to two IO ports 0x2E through 0x2F. The last argument is a Boolean value
specifying whether to grant or to remove the access.
#include <unistd.h>
...
ioperm(0x2E, 2, 1);
setuid(getuid()); // to drop root privileges, if this is a setuid-root file