Owners Manual

Table 9. Memory operating modes (continued)
Memory Operating Mode Description
For multi rank sparing, the multiplier changes to 1/2 (ranks/channel).
NOTE: To use memory sparing, this feature must be enabled in the BIOS menu of
System Setup.
NOTE: Memory sparing does not offer protection against a multi-bit uncorrectable
error.
Dell Fault Resilient Mode The Dell Fault Resilient Mode if enabled, the BIOS creates an area of memory that is
fault resilient. This mode can be used by an OS that supports the feature to load critical
applications or enables the OS kernel to maximize system availability.
Optimizer Mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not
impose any specific slot population requirements.
● Dual processor: Populate the slots in round robin sequence starting with processor 1.
NOTE: Processor 1 and processor 2 population should match.
Table 10. Memory population rules
Processor Configuration Memory population Memory population information
Single processor Optimizer (Independent
channel) population order
1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
11, 12
● DIMMs must be populated in the order
specified.
● Odd number of DIMM population is allowed
NOTE: Odd number of DIMMs will result
in unbalanced memory configurations,
which in turn will result in performance
loss. It is recommended to populate
all memory channels identically with
identical DIMMs for best performance.
● Optimizer population order is not traditional
for 4 and 8 DIMM installations of single
processor.
○ For 4 DIMMs: A1, A2, A4, A5
○ For 8 DIMMs: A1, A2, A4, A5, A7, A8,
A10, A11
Mirror population order {1, 2, 3, 4, 5, 6} {7, 8, 9,
10, 11, 12}
Mirroring is supported with 6 or 12 DIMMs per
processor.
Single rank sparing
population order
1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
11, 12
● DIMMs must be populated in the order
specified.
● Requires two ranks or more per channel.
Multi rank sparing
population order
1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
11, 12
● DIMMs must be populated in the order
specified.
● Requires three ranks or more per channel.
Fault resilient population
order
{1, 2, 3, 4, 5, 6} {7, 8, 9,
10, 11, 12}
Supported with 6 or 12 DIMMs per processor.
Dual processor (Start
with processor1.
processor1 and
processor 2
population should
match)
Optimized (Independent
channel) population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
Odd number of DIMM population per processor
is allowed.
NOTE: Odd number of DIMMs will result in
unbalanced memory configurations, which
in turn will result in performance loss. It
is recommended to populate all memory
68 Installing and removing system components