Service Manual

System profile selected (for example, Performance Optimized, or Custom [can be run at high speed or lower])
Maximum supported DIMM speed of the processors
Maximum supported speed of the DIMMs
NOTE: MT/s indicates DIMM speed in MegaTransfers per second.
The system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipset
architectural configuration. The following are the recommended guidelines for installing memory modules:
All DIMMs must be DDR4.
Mixing of memory module capacities in a system is not supported.
If memory modules with different speeds are installed, they operate at the speed of the slowest installed memory module(s).
Populate memory module sockets only if a processor is installed.
For single-processor systems, sockets A1 to A16 are available.
For single-processor systems, sockets A1 to A16 are available.
For dual-processor systems, sockets A1 to A16 and sockets B1 to B16 are available.
In Optimizer Mode, the DRAM controllers operate independently in the 64-bit mode and provide optimized memory
performance.
Table 44. Memory population rules
Processor Configuration Memory population Memory
population
information
Single processor Optimizer (Independent channel)
population order
A{1}, A{2}, A{3}, A{4}, A{5}, A{6},
A{7}, A{8}, A{9}, A{10}, A{11},
A{12}, A{13}, A{14}, A{15}, A{16}
Odd amount of
DIMMs per
processor allowed.
Table 45. Memory population rules
Processor Configuration Memory population Memory population
information
Single processor Optimizer (Independent
channel) population order
A{1}, A{2}, A{3}, A{4}, A{5},
A{6}, A{7}, A{8}, A{9}, A{10},
A{11}, A{12}, A{13}, A{14}, A{15},
A{16}
Odd amount of DIMMs per
processor allowed.
Dual processor (Start with
processor1. Processor 1
and processor 2
population should match)
Optimizer (Independent
channel) population order
A{1}, B{1}, A{2}, B{2}, A{3}, B{3},
A{4}, B{4}, A{5}, B{5}, A{6},
B{6}, A{7}, B{7} A{8}, B{8}
Odd amount of DIMMs per
processor is allowed.
DIMMs must be populated
identically per processor.
Table 46. Memory population rules
Processor Configuration Memory population Memory population
information
Single processor Optimizer (Independent
channel) population order
A{1}, A{2}, A{3}, A{4}, A{5},
A{6}, A{7}, A{8}
Odd amount of DIMMs per
processor allowed.
Dual processor (Start with
processor1. Processor 1
and processor 2
population should match)
Optimizer (Independent
channel) population order
A{1}, B{1}, A{2}, B{2}, A{3}, B{3},
A{4}, B{4}, A{5}, B{5}, A{6},
B{6}, A{7}, B{7} A{8}, B{8}
Odd amount of DIMMs per
processor allowed.
NOTE: Odd number of
DIMMs will result in
unbalanced memory
configurations, which
in turn will result in
performance loss. It is
recommended to
populate all memory
channels identically
with identical electrical
Installing and removing system components 73