Reference Guide

56 System Event Log Messages for IPMI Systems
Hdwr version err
hardware incompatibility
(BMC Firmware and CPU
mismatch) was deasserted
Information This event is generated when the earlier mismatch
between the BMC firmware and the processor is
corrected.
Hdwr version err
hardware incompatibility
(BMC Firmware and other
mismatch) was asserted
Critical This event is generated when there is a mismatch
between the BMC firmware and the processor in use or
vice versa.
Hdwr version err
hardware incompatibility
(BMC Firmware and CPU
mismatch) was deasserted
Information This event is generated when an earlier hardware
mismatch is corrected.
SBE Log Disabled
correctable memory error
logging disabled was asserted
Critical This event is generated when the ECC single bit error
rate is exceeded.
CPU Protocol Err
transition to non-recoverable
Critical This event is generated when the processor protocol
enters a non-recoverable state.
CPU Bus PERR
transition to non-recoverable
Critical This event is generated when the processor bus PERR
enters a non-recoverable state.
CPU Init Err
transition to non-recoverable
Critical This event is generated when the processor
initialization enters a non-recoverable state.
CPU Machine Chk
transition to non-recoverable
Critical This event is generated when the processor machine
check enters a non-recoverable state.
Logging Disabled
all event logging disabled was
asserted
Critical This event is generated when all event logging is
disabled.
Unknown system event sensor
unknown system hardware
failure was asserted
Critical This event is generated when an unknown hardware
failure is detected.
Table 3-12. BIOS Generated System Events (continued)
Event Message Severity Cause