Reference Guide

Table 5. Processor Settings details (continued)
Option Description
only one logical processor per core. This option is set to
Enabled by default.
Virtualization Technology Enables or disables the virtualization technology for the
processor. This option is set to Enabled by default.
IOMMU Support Enable or Disable IOMMU support. It is required to create
IVRS ACPI table. This option is set to Enabled by default.
L1 Stream HW Prefetcher Enables or disables the L1 stream hardware prefetcher. This
option is set to Enabled by default.
L2 Stream HW Prefetcher Enables or disables the L2 stream hardware prefetcher. This
option is set to Enabled by default.
MADT Core Enumeration Specifies the MADT Core Enumeration. This option is set to
Linear by default.
NUMA Nodes Per Socket Specifies the number of NUMA nodes per socket. This option
is set to 1 by default.
L3 cache as NUMA Domain Enables or disables the CCX as NUMA Domain. This option is
set to Disabled by default.
Minimum SEV non-ES ASID Determines the number of Secure Encrypted Virtualization ES
and non-ES available Address Space IDs. This option is set to
1 by default.
x2APIC Mode Enable or disable x2APIC mode. This option is set to Enabled
by default.
NOTE: For two CPU 64 cores configuration, x2APIC
mode is not switchable if 256 threads are enabled (BIOS
settings: All CCD, cores and logical processors enabled).
Number of CCDs per Processor Controls the number of enabled CCDs in each processor. This
option is set to All by default.
Number of Cores per CCD specifies the number of cores per CCD. This option is set to
All by default.
Processor Core Speed Specifies the maximum core frequency of the processor.
Processor n
NOTE: Depending on the number of CPUs, there might be
up to n processors listed.
The following settings are displayed for each processor
installed in the system:
Table 6. Processor n details
Option Description
Family-Model-Stepping Specifies the family, model, and stepping of the processor as
defined by AMD.
Brand Specifies the brand name.
Level 2 Cache Specifies the total L2 cache.
Level 3 Cache Specifies the total L3 cache.
Number of Cores Specifies the number of cores per processor.
Microcode Specifies the processor microcode version.
Pre-operating system management applications 7