Users Guide

Standby clock source states
Under normal circumstances, all network elements are synced to the active clock source. If the active clock source becomes
faulty, a reference source from the available standby clock sources is selected based on the selection algorithm. The standby
clock sources work in any of the following states:
● Available—The clock source is operationally up.
● Failed—The clock source is in signal fail state or the SyncE-enabled interfaces do not receive any clock signal. This state can
be caused due to link failure, ESMC timeout, or frequency recovery failure.
● Locked—The clock source is not available for the selection process.
● Wait-to-Restore—The clock source has recovered from the signal fail state and is waiting for the wait-to-restore interval to
expire so that it can participate in the clock selection process.
● Holdover—The lock status of a system clock when it is not synchronized to any of the reference clock sources.
● Free Run—The temporary state until a valid source is available.
● Acquiring—The state of acquiring lock before moving to either frequency locked or holdover state.
Restrictions and limitations
● SNMP MIBs for ESMC statistics and SyncE events are not supported.
● In a link aggregation group (LAG), the SyncE configuration is supported only on the member ports of the LAG. SyncE
configuration is not supported on the LAG.
● SyncE is supported only on some specific optics. See Appendix III of ITU G.8262 standard for the list of SyncE compatible
interfaces.
● SyncE is not supported on the following 10G SFP+ ports on S5232F-ON platform: 33 and 34. Hence, these ports cannot be
used for recovering clock frequency.
● 1G ports are not supported for recovering clock frequency even though an in-accurate clock frequency recovery is possible.
Hence, Dell Technologies recommend not to use 1G ports for SyncE.
Sample configurations
The following figure shows a simple topology with SyncE enabled switches, Switch A and Switch B connected to each other
through a back-to-back interface. The external clock source SRC-1 is configured with quality level SSU-A, and SRC-2 is
configured with quality level PRC.
Figure 1. SyncE sample configuration
The following sections explain the minimum configurations that are required to set up different modes of SyncE and hybrid
clocking:
● SyncE QL-enabled mode with ESMC and SSM
● SyncE QL-disabled mode
● PTP and SyncE enabled on different Ethernet ports
● PTP and SyncE enabled on same Ethernet ports
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System management