CLI Guide

BIOS.SysProfileSettings.CpuInterconnectBusLinkPower (Read or
Write)
Description
When enabled, CPU interconnect bus link power management is enabled
Legal Values
● Enabled
● Disabled
Default Value Not Applicable
Write Privilege Server Control
License Required iDRAC Express or iDRAC Enterprise
Dependency Not applicable
BIOS.SysProfileSettings.DeterminismSlider (Read or Write)
Description
It controls whether BIOS will enable determinism to control performance. Performance - BIOS will enable
100% deterministic performance control. Power - BIOS will not enable deterministic performance control.
Has a dependency on the System Profile. Can only be set if the System Profile is set to Custom. Is set to
Performance Determinism if the System Profile is set to Performance Per Watt (OS) and Performance.
Legal Values
● PerfDeterminism
● PowerDeterminism
Default Value Not Applicable
Write Privilege Server Control
License Required iDRAC Express or iDRAC Enterprise
Dependency Not applicable
BIOS.SysProfileSettings.DlwmForcedWidth (Read or Write)
Description
None
Legal Values
● x16
● x8
● x2
Default Value Not Applicable
Write Privilege Server Control
License Required iDRAC Express or iDRAC Enterprise
Dependency Not applicable
BIOS.SysProfileSettings.DynamicLinkWidthManagement (Read or
Write)
Description
DLWM reduces the XGMI link width between sockets from x16 to x8 (default), when no traffic is
detected on the link. As with Data Fabric and Memory Pstates, this feature is optimized to trade power
between core and high IO/memory bandwidth workloads. Forced = Force link width to x16, x8, or x2.
Unforced = Link width will be managed by DLWM engine.
Legal Values
● Forced
● Unforced
384 BIOS Attributes