User's Manual

DFZM-E72xx
Data Sheet Sheet 13 of 40 Sep 16, 2013
Proprietary Information and Specifications are Subject to Change
PC1 ADC3 TRACEDATA0, SWO Standard
PC2 JTDO
6
, SWO Standard
PC3 JTDI
5
Standard
PC4 SWDIO
7
SWDIO
7
, JTMS
7
Standard
PC5 TX_ACTIVE Standard
Notes:
1.Default signal assignment (not remapped).
2. Overrides during reset as an input with pull up.
3. Overrides after reset as an open-drain output.
4. Alternate signal assignment (remapped).
5. Overrides in JTAG mode as a input with pull up.
6. Overrides in JTAG mode as a push-pull output.
7. Overrides in Serial Wire mode as either a push-pull output, or a floating input, controlled by the debugger.
Table 3-1: DFZM-E72xx GPIO signal assignments
The DFZM-E72xx has two serial controllers, SC1 and SC2, which provide several options for full-duplex
synchronous and asynchronous serial communications.
 SPI (Serial Peripheral Interface), master or slave
 TWI (Two Wire serial Interface), master only
 UART (Universal Asynchronous Receiver/Transmitter), SC1 only
 Receive and transmit FIFOs and DMA channels, SPI and UART modes
Before using a serial controller, configure and initialize it as follows:
1. Set up the parameters specific to the operating mode (master/slave for SPI, baud rate for UART, etc.).
2. Configure the GPIO pins used by the serial controller as shown in Tables 3-2 and 3-3.
3. If using DMA, set up the DMA and buffers.
4. If using interrupts, select edge- or level-triggered interrupts with the SCx_INTMODE register, enable the
desired second-level interrupt sources in the INT_SCxCFG register, and finally enable the top-level SCx interrupt
in the NVIC.
5. Write the serial interface operating mode (SPI, TWI, or UART) to the SCx_MODE register