User's Manual

Table Of Contents

DFZM-E72xx

Data Sheet Sheet 22 of 40 Sep 16, 2013

Proprietary Information and Specifications are Subject to Change

Select alternate output function with GPIO_PCCFGL[7:4]

PC0 I/O

Digital I/O, High current, Either enable with GPIO_DBGCFG[5]

or enable Serial Wire mode (see JTMS description, Pin 21) and disable TRACEDATA1

JRST I

JTAG reset input from debugger

Selected when in JTAG mode (default mode, see JTMS description) and

TRACEDATA1 is disabled, Internal pull-up is enabled

IRQD I Default external interrupt source D

TRACEDATA1 O

Synchronous CPU trace data bit 1

Select 2- or 4-wire synchronous trace interface in ARM core

Enable trace interface in ARM core,

Select alternate output function with GPIO_PCCFGL[3:0]

PB7 I/O Digital I/O, High current

ADC2 Analog ADC Input 2, Enable analog function with GPIO_PBCFGH[15:12]

IRQC I Default external interrupt source C

TIM1C2 O

Timer 1 channel 2 output, Enable timer output in TIM1_CCER

Select alternate output function with GPIO_PBCFGH[15:12]

TIM1C2 I Timer 1 channel 2 input, Cannot be remapped

PB6 I/O Digital I/O, High current

ADC1 Analog ADC Input 1, Enable analog function with GPIO_PBCFGH[11:8]

IRQB I External interrupt source B

TIM1C1 O

Timer 1 channel 1 output, Enable timer output in TIM1_CCER

Select alternate output function with GPIO_PBCFGH[11:8]

TIM1C1 I Timer 1 channel 1 input, Cannot be remapped

PB5 I/O Digital I/O(Not available for DFZM-E721X-DT0R)

ADC0 Analog ADC Input 0, Enable analog function with GPIO_PBCFGH[7:4]

TIM2CLK I Timer 2 external clock input

TIM1MSK I Timer 1 external clock mask input

28 GND Ground Ground