Specifications

5
VFD-M Series
DELTA ELECTRONICS, INC. ALL RIGHTS RESERVED
5-43
Start
bit
01234
5
6
Stop
bit
Stop
bit
8-data bits
11-bits character frame
( 8.N.2:Pr.92=3)
Start
bit
01234
5
6
Even
p
arity
Stop
bit
8-data bits
11-bits character frame
( 8.E.1:Pr.92=4)
Start
bit
0
12
3456
Stop
bit
8-data bits
11-bits character frame
( 8.O.1:Pr.92=5)
Odd
parity
7
7
7
 3. Communication Protocol
3.1 Communication Data Frame:
STX ADR
1
ADR
0
CMD
1
CMD
0
0 1 ...... N-1 N ETX CHK
1
CHK
0
02H Address CMD Data characters 03H Check Sum
3.2 ASCII mode:
STX Start character: (3AH)
ADR 1
ADR 0
CMD 1
CMD 0
Communication address:
8-bit address consists of 2 ASCII codes
DATA (n-1)
……
DATA 0
Contents of data:
n x 8-bit data consist of 2n ASCII codes.
n
≦25 maximum of 50 ASCII codes
LRC CHK 1
LRC CHK 0
LRC check sum:
8-bit check sum consists of 2 ASCII codes
END 1
END 0
END characters:
END 1 = CR (0DH), END 0 = LF (0AH)
RTU mode:
START
A silent interval of more than 10 ms
ADR Communication address: 8-bit address
CMD Command code: 8-bit command
DATA (n-1)
…….
DATA 0
Contents of data: n
×8-bit data, n<=25
CRC CHK Low
CRC CHK High
CRC check sum:
16-bit check sum consists of 2 8-bit characters
END A silent interval of more than 10 ms