^1HARDWARE REFERENCE MANUAL ^2 PMAC PCI ^3 PCI-Bus Expansion w/Piggyback CPU ^4 4A0-603588-100 ^5 April 27, 2010 Single Source Machine Control Power // Flexibility // Ease of Use 21314 Lassen Street Chatsworth, CA 91311 // Tel. (818) 998-2095 Fax. (818) 998-7807 // www.deltatau.
Copyright Information © 2010 Delta Tau Data Systems, Inc. All rights reserved. This document is furnished for the customers of Delta Tau Data Systems, Inc. Other uses are unauthorized without written permission of Delta Tau Data Systems, Inc. Information contained in this manual may be updated from time-to-time due to product improvements, etc., and may not conform in every respect to former issues. To report errors or inconsistencies, call or email: Delta Tau Data Systems, Inc.
REVISION HISTORY REV. DESCRIPTION DATE CHG APPVD 1 UPDATED JUMPER INFO & SOFTWARE SETUP 10/19/06 CP M. COGUR 2 UPDATED JUMPER SETTINGS FOR E121 & E122 04/27/10 CP S.
PMAC-PCI Hardware Reference Table of Contents INTRODUCTION .......................................................................................................................................................1 Board Configuration..................................................................................................................................................1 Base Version .......................................................................................................................
PMAC-PCI Hardware Reference E0: Machine Output............................................................................................................................................14 E1 - E2: Machine Output Supply Voltage Configure..........................................................................................14 E3 - E6: Servo Clock Frequency Control ..........................................................................................................
PMAC-PCI Hardware Reference Optional Voltage to Frequency Converter..........................................................................................................34 Thumbwheel Multiplexer Port (JTHW Port)...........................................................................................................35 Optional Analog Inputs (JANA Port)......................................................................................................................
PMAC-PCI Hardware Reference Configuring PMAC with Option-5C for 80 MHz Operation ..................................................................................58 Option 16 Supplemental Memory ...........................................................................................................................59 SCHEMATICS ..........................................................................................................................................................
PMAC-PCI Hardware Reference Table of Contents v
PMAC-PCI Hardware Reference INTRODUCTION The PMAC PCI is a member of the PMAC family of boards optimized for interface to traditional servo drives with single analog inputs representing velocity or torque commands. Its software is capable of 8 axes of control. It can have up either eight or four channels of on-board axis interface circuitry. The PMAC PCI is a full-sized PCI-bus expansion card, with a small piggyback board containing the CPU board.
PMAC-PCI Hardware Reference Option 5x: CPU Type The base PMAC version without options has a 20 MHz CPU with flash memory RAM.
PMAC-PCI Hardware Reference PMAC Connectors and Indicators J1 - Display Port (JDISP Port) The JDISP connector allows connection of the Acc-12 or Acc-12A liquid crystal displays, or of the Acc12C vacuum fluorescent display. Both text and variable values may be shown on these displays using the DISPLAY command, executing in either motion or PLC programs.
PMAC-PCI Hardware Reference JS1/JS2 – Expansion Ports (JS1/JS2 Ports) These ports are used only when connecting to optional PMAC accessory boards. TB1 – Power Supply Terminal Block (JPWR Connector) This terminal block may be used as an alternative power supply connector if PMAC PCI is not installed in a PCI-bus. LED Indicators PMACs with the Option CPU have three LED indicators: red, yellow, and green.
PMAC-PCI Hardware Reference PMAC Board Layout Part Number 603588-100 Introduction Feature Location Feature Location E0 E1 E2 E3 E4 E5 E6 E7 E17A E17B E17C E17D E17E E17F E17G E17H E22 E23 E28 E29 E30 E31 E32 E33 E34 E34A E35 E36 E37 E38 E40 E41 E42 E43 E44 E45 E46 E47 E48 E49 E50 E51 E54 E55 E56 A6 A6 A6 A4 A4 A4 A4 A6 A4 A4 A4 A4 C5 C5 C4 C4 A9 A9 C6 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 A4 B5 B5 B5 B5 B5 B5 C5 C5 C5 C5 C5 B6 B7 B7 B7 E57 E58 E59 E60 E61 E62 E63 E64 E65 E72 E73 E74 E75 E85 E87 E88 E89 E90
PMAC-PCI Hardware Reference 1 E38 E37 E36 E35 E34 E34A 2 E3 E4 E5 E6 3 E17D E17C E17B E17A E29 E30 E31 E32 E33 E61 E60 E59 E58 E65 E64 E63 E62 4 E57 E56 E55 E54 5 6 7 8 9 A 6 B C Introduction
PMAC-PCI Hardware Reference PMAC Connectors Introduction 7
PMAC-PCI Hardware Reference JUMPER SUMMARY On the PMAC, you will see many jumpers (pairs of metal prongs), called E-points. Some have been shorted together; others have been left open. These jumpers customize the hardware features of the board for a given application and must be setup appropriately. The following is an overview of the several PMAC jumpers grouped in appropriate categories.
PMAC-PCI Hardware Reference Clock Configuration Jumpers E3-E6: Servo Clock Frequency Control – The jumpers E3 – E6 determine the servo-clock frequency by controlling how many times it is divided down from the phase-frequency. The default setting of E3 and E4 OFF, E5 and E6 ON divides the phase-clock frequency by 4, creating a 2.25 kHz servo-clock frequency. This setting is seldom changed.
PMAC-PCI Hardware Reference Communication Jumpers PCI Bus Base Address Control – The selection of the base address of the card in the I/O space of the host PC’s expansion bus is assigned automatically by the operating system and it is not selected through a jumper configuration. E44-E47: Serial Baud Rate Selection –The configuration of these jumpers and the particular CPU Option ordered will determine the baud rate at which PMAC will communicate through its J4 serial port.
PMAC-PCI Hardware Reference E28: Following-Error/Watchdog-Timer Signal Control – With this jumper connecting pins 2 and 3 (default), the FEFCO/ output on pin 57 of the J8 JMACH1 servo connector outputs the watchdog timer signal. With this jumper connecting pins 1 and 2, this pin outputs the warning following error status line for the selected coordinate system. WARNING: A wrong setting of these jumpers will damage the associated output IC.
PMAC-PCI Hardware Reference Power-Up State Jumpers Jumper E4 on the Non-Turbo CPU board must be OFF, jumper E5 must be ON, and jumper E6 must be ON, in order for the CPU to copy the firmware from flash memory into active RAM on power-up/reset. This is necessary for normal operation of the card. (Other settings are for factory use only.
PMAC-PCI Hardware Reference E-POINT DESCRIPTIONS CPU Board E-Point Descriptions The following jumper descriptions are for the PMAC CPU part number 602705-107. E1: Watchdog Disable Jumper E Point and Physical Layout E1 Description Default Jump pin 1 to 2 to disable Watchdog timer (for test purposes only). Remove jumper to enable Watchdog timer. No Jumper E2: DPRAM Location Configure E Point and Physical Layout E2 Description Default Jump pin 1 to 2 to access the dual-ported RAM on baseboard.
PMAC-PCI Hardware Reference Main Board E-Point Jumper Descriptions E0: Machine Output E Point and Physical Layout Location Description Default Jump pin 1 to 2 To provide use of 5V outputs No jumper E0 A6 E1 - E2: Machine Output Supply Voltage Configure E Point and Physical Layout Location E1 A6 Description Default CAUTION The jumper setting must match the type of driver IC, or damage to the IC will result.
PMAC-PCI Hardware Reference E3 - E6: Servo Clock Frequency Control The servo clock (which determines how often the servo loop is closed) is derived from the phase clock (see E98, E29 - E33) through a divide-by-N counter. Jumpers E3 through E6 control this dividing function.
PMAC-PCI Hardware Reference E17A-D: Amplifier Enable/Direction Polarity Control E Point and Physical Layout Location E17A Description Default A4 Jump 1-2 for high-true AENA1. Remove jumper for low-true AENA1. No jumper installed E17B A4 Jump 1-2 for high-true AENA2. Remove jumper for low-true AENA2. No jumper installed E17C A4 Jump 1-2 for high-true AENA3. Remove jumper for low-true AENA3. No jumper installed E17D A4 Jump 1-2 for high-true AENA4. Remove jumper for low-true AENA4.
PMAC-PCI Hardware Reference E22 - E23: Control Panel Handwheel Enable E Point and Physical Layout Location E22 E23 Description Default A9 Jump pin 1 to 2 to obtain handwheel encoder signal from front panel at J2-16 for CHB2 (ENC2-B). No jumper A9 Jump pin 1 to 2 to obtain handwheel encoder signal from front panel at J2-22 for CHA2 (ENC2-A). No jumper Note: With these jumpers ON, no encoder should be wired into ENC2 on JMACH1.
PMAC-PCI Hardware Reference E34 - E38: Encoder Sampling Clock Frequency Control Jumpers E34 - E38 control the encoder-sampling clock (SCLK) used by the gate array ICs. No more than one of these six jumpers may be on at a time. E34A E34 E35 E36 E37 E38 Default and Physical Layout SCLK Clock Frequency E34A E34 E35 E36 E37 E38 A4 A4 A4 A4 A4 A4 ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF ON 19.6608 MHz 9.
PMAC-PCI Hardware Reference E44 - E47: Serial Port Baud Rate Jumpers E44 - E47 control what baud rate to use for serial communications. Any character received over the bus causes PMAC to use the bus for its standard communications. The serial port is disabled if E44E47 are all on. The baud rate setting of an 80 MHz CPU section ordered with Opt 5C is performed by software; refer to the dedicated section on the Software Configuration chapter of this manual.
PMAC-PCI Hardware Reference E49: Serial Communications Parity Control E Point and Physical Layout Location E49 C5 Description Default Jump pin 1 to 2 for NO serial parity. Remove jumper for ODD serial parity. Jumper installed E50: Flash Save Enable/Disable E Point and Physical Layout Location E50 C5 Description Default Jump pin 1 to 2 to enable save to flash memory. Remove jumper to disable save to flash memory.
PMAC-PCI Hardware Reference E54 - E65: Host Interrupt Signal Select E Point and Physical Layout Location E58 Description Default B7 Jump pin 1 to 2 to allow MI2 to interrupt hostPC at PMAC interrupt level IR6. No jumper installed E59 B7 Jump pin 1 to 2 to allow AXIS EXPANSION INT-0 to interrupt host-PC at PMAC interrupt level IR6. No jumper installed E60 B7 Jump pin 1 to 2 to allow EQU6 to interrupt host-PC at PMAC interrupt level IR6.
PMAC-PCI Hardware Reference E74 - E75: Clock Output Control for Ext. Interpolation E Point and Physical Layout Location E74 E75 Description Default B9 Jump pin 1 to 2 to allow SCLK/ to output on CHC4/. No jumper installed B9 Jump pin 1 to 2 to allow SCLK to output on CHC4. No jumper installed Note: SCLK out permits synchronous latching of analog encoder interpolators such as Acc-8D Opt 8.
PMAC-PCI Hardware Reference E90: Host-Supplied Switch Pull-Up Enable E Point and Physical Layout Location E90 B5 Description Default Jump pin 1 to 2 to use A+15V from J8 pin 59 as supply for input flags (E89 ON) {flags should be tied to AGND} or A+15V/OPT+V from J7 pin 59 as supply for input flags (E89 OFF) {flags should be tied to separate 0V reference}. Jump pin 2 to 3 to use +12V from PC bus connector P1-pin B09 as supply for input flags {flags should be tied to GND}.
PMAC-PCI Hardware Reference E101 - E102: Motors 1-4 Amplifier Enable Output Configure E Point and Physical Layout Location E101 A3 Description Default CAUTION: The jumper setting must match the type of driver IC, or damage to the IC will result. 1-2 Jumper installed Jump pin 1 to 2 to apply A+15V/A+V (as set by E100) to pin 10 of "U37" AENAn & EQUn driver IC (should be ULN2803A for sink output configuration).
PMAC-PCI Hardware Reference E111: Clock Lines Output Enable E Point and Physical Layout Location E111 A7 Description Default Jump pin 1 to 2 to enable the PHASE, SERVO and INIT lines on the J4 connector. Jump pin 2 to 3 to disable the PHASE, SERVO and INIT lines on the J4 connector. E111 on positions 1 to 2 is necessary for daisy-chained PMACs sharing the clock lines for synchronization.
PMAC-PCI Hardware Reference E121 - E122: XIN Feature Selection 26 E Point and Physical Layout Location E121 E122 Description Default F1 Jump 1-2 to bring the QuadLoss signal for Encoder 7 into register XIN6 at Y:$E801 bit 6. Jump 2-3 to bring the QuadLoss signal for Encoder 6 into register XIN6 at Y:$E801 bit 6. 1-2 Jumper installed F1 Jump 1-2 to bring the PowerGood signal into register XIN7 at Y:$E801 bit 7.
PMAC-PCI Hardware Reference MACHINE CONNECTIONS Typically, the user connections are actually made to a terminal block that is attached to the JMACH connector by a flat cable (Acc-8D or 8P). The pinout numbers on the terminal block are the same as those on the JMACH connector.
PMAC-PCI Hardware Reference Typically, this supply can come from the servo amplifier; many commercial amplifiers provide such a supply. If this is not the case, an external supply may be used. Acc-2x provides different options for the ± 15V power supply. Even with an external supply, the AGND line should be tied to the amplifier common. It is possible to get the power for the analog circuits from the bus, but doing so defeats optical isolation. In this case, no new connections need to be made.
PMAC-PCI Hardware Reference Home Switches While normally closed-to-ground switches are required for the overtravel limits inputs, the home switches could be either normally close or normally open types. The polarity is determined by the home sequence setup, through the I-variables I902, I907, ... I977.
PMAC-PCI Hardware Reference If Pin 1 of the resistor pack, marked by a dot on the pack, matches Pin 1 of the socket, marked by a wide white line on the front side of the board, and a square solder pin on the back side of the board, then the pack is configured as a bank of pull-down resistors. If the pack is reversed in the socket, it is configured as a bank of pull-up resistors.
PMAC-PCI Hardware Reference This magnitude-and-direction mode is suited for driving servo amplifiers that expect this type of input, and for driving voltage-to-frequency (V/F) converters, such as PMAC’s Acc-8D Option 2 board, for running stepper motor drivers. If you are using PMAC to commutate the motor, you will use two analog output channels for the motor. Each output may be single-ended or differential, just as for the DC motor.
PMAC-PCI Hardware Reference Amplifier Fault Signal (FAULTn) This input can take a signal from the amplifier so PMAC knows when the amplifier is having problems, and can shut down action. The polarity is programmable with I-variable Ix25 (I125 for motor #1) and the return signal is analog ground (AGND). FAULT1 is pin 49. With the default setup, this signal must actively be pulled low for a fault condition.
PMAC-PCI Hardware Reference Do not connect these outputs directly to the supply voltage, or damage to the PMAC will result from excessive current draw. The user can provide a high-side voltage (+5 to +24V) into Pin 33 of the JOPTO connector, and allow this to pull up the outputs by connecting pins 1 and 2 of Jumper E1. Jumper E2 must also connect pins 1 and 2 for a ULN2803A sinking output. It is possible for these outputs to be sourcing drivers by substituting a UDN2981A IC for the ULN2803A.
PMAC-PCI Hardware Reference Reset Input Input INIT/ (reset) affects the entire card. It has the same effect as cycling power or a host $$$ command. It is hard-wired, so it retains its function even if I2 is set to 1. Handwheel Inputs The handwheel inputs HWCA and HWCB can be connected to the second encoder counter on PMAC with jumpers E22 and E23. If these jumpers are on, nothing else should be connected to the Encoder 2 inputs.
PMAC-PCI Hardware Reference Thumbwheel Multiplexer Port (JTHW Port) The Thumbwheel Multiplexer Port, or Multiplexer Port, on the JTHW (J3) connector has eight input lines and eight output lines. The output lines can be used to multiplex large numbers of inputs and outputs on the port, and Delta Tau provides accessory boards and software structures (special M-variable definitions) to capitalize on this feature. Up to 32 of the multiplexed I/O boards may be daisy-chained on the port, in any combination.
PMAC-PCI Hardware Reference Compare Equal Outputs Port (JEQU Port) The compare-equals (EQU) outputs have a dedicated use of providing a signal edge when an encoder position reaches a pre-loaded value. This is useful for scanning and measurement applications. Instructions for use of these outputs are covered in detail in the PMAC’s User Manual. Outputs can be configured sinking or sourcing by replacing the chips U37 or U53 and configuring the jumpers E101-102 or E114-E115.
PMAC-PCI Hardware Reference Machine Connections Example Machine Connection 37
PMAC-PCI Hardware Reference 38 Machine Connection
PMAC-PCI Hardware Reference MATING CONNECTORS This section lists several options for each connector. Choose an appropriate one for your application. (See attached PMAC mating connector sketch for typical connection) Base Board Connectors J1 (JDISP)/Display 1. Two 14-pin female flat cable connector Delta Tau P/N 014-R00F14-0K0, T&B Ansley P/N 609-1441 2. 171-14 T&B Ansley standard flat cable stranded 14-wire 3. Phoenix varioface modules type FLKM14 (male pins) P/N 22 81 02 1 J2 (JPAN)/Control Panel 1.
PMAC-PCI Hardware Reference Note: Normally, J7 and J8 are used with Acc-8P or 8D with Option P, which provides complete terminal strip fan-out of all connections. JS1/A-D Inputs 1-4 1. Two 16-pin female flat cable connector Delta Tau P/N 014-R00F16-0K0, T&B Ansley P/N 609-1641 2. 171-16 T&B Ansley standard flat cable stranded 16-wire 3. Phoenix varioface module type FLKM 16 (male pins) P/N 22 81 03 4 JS2/A-D Inputs 5-8 (Option 1 Required) 1.
PMAC-PC Hardware Reference BASE BOARD CONNECTOR PINOUTS J1: Display Port Connector J1 JDISP (14-Pin Connector) Front View Pin # Symbol Function Description Notes 1 Vdd Output +5V Power Power supply out 2 Vss Common PMAC Common 3 Rs Output Read Strobe TTL signal out 4 Vee Output Contrast Adjust VEE 0 TO +5 VDC * 5 E Output Display Enable High is enable 6 R/W Output Read or Write TTL signal out 7 DB1 Output Display Data 1 8 DB0 Output Display Data 0 9 DB3 Output Display Data 3 10 DB2 Output Display Dat
PMAC-PC Hardware Reference J2: Control Panel Port Connector J2 JPAN (26-Pin Connector) Front View Pin # Symbol Function 1 2 3 4 5 6 7 +5V GND FPD0/ JOG-/ FPD1/ JOG+/ PREJ/ Output Common Input Input Input Input Input Description 8 STRT/ Input Start Program Run 9 STEP/ Input Step Through Program 10 STOP/ Input Stop Program Run 11 HOME/ Input Home Search Command 12 HOLD/ Input Hold Motion 13 14 15 FPD2/ FPD3/ INIT/ Input Input Input Motor/C.S. Select Bit 2 Motor/C.S.
PMAC-PC Hardware Reference J3: Multiplexer Port Connector J3 JTHW (26-Pin Connector) Front View Pin # Symbol Function Description Notes 1 GND Common PMAC Common 2 GND Common PMAC Common 3 DAT0 Input Data-0 Input Data input from multiplexed accessory 4 SEL0 Output Select-0 Output Multiplexer select output 5 DAT1 Input Data-1 Input Data input from multiplexed accessory 6 SEL1 Output Select-1 Output Multiplexer select output 7 DAT2 Input Data-2 Input Data input from multiplexed accessory 8 SEL2 Output S
PMAC-PC Hardware Reference J4: Serial Port Connector J4 JRS422 (26-Pin Connector) Front View Pin # Symbol Function Description Notes 1 CHASSI Common PMAC Common 2 S+5V Output +5VDC Supply Deactivated by E8 3 RDInput Receive Data Diff. I/O low TRUE ** 4 RD+ Input Receive Data Diff. I/O high TRUE * 5 SDOutput Send Data Diff. I/O low TRUE ** 6 SD+ Output Send Data Diff. I/O high TRUE * 7 CS+ Input Clear to Send Diff . I/O high TRUE ** 8 CSInput Clear to Send Diff. I/O low TRUE * 9 RS+ Output Req.
PMAC-PC Hardware Reference J5: I/O Port Connector J5 JOPT (34-Pin Connector) Front View Pin # Symbol Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 MI8 GND MI7 GND MI6 GND MI5 GND MI4 GND MI3 GND MI2 GND MI1 GND MO8 Input Common Input Common Input Common Input Common Input Common Input Common Input Common Input Common Output Machine input 8 PMAC common Machine input 7 PMAC common Machine input 6 PMAC common Machine input 5 PMAC common Machine input 4 PMAC common Machine input 3 PMAC common Machi
PMAC-PC Hardware Reference J6: Auxiliary I/O Port Connector J6 JXIO (10-Pin Connector) Front View Pin # Symbol Function Description Notes 1 CHA1 Input Enc. A Chan. Pos. Axis #1 for resolver 2 CHB1 Input Enc. B Chan. Pos. Axis #1 for resolver 3 CHC1 Input Enc. C Chan. Pos. Axis #1 for resolver 4 CHA3 Input Enc. A Chan. Pos. Axis #3 for resolver 5 CHB3 Input Enc. B Chan. Pos. Axis #3 for resolver 6 CHC3 Input Enc. C Chan. Pos.
PMAC-PC Hardware Reference J7: Machine Port 2 Connector J7 JMACH2 (60-Pin Header) Front View Pin # Symbol Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 +5V +5V GND GND CHC7 CHC8 CHC7/ CHC8/ CHB7 CHB8 CHB7/ CHB8/ CHA7 CHA8 CHA7/ CHA8/ Output Output Common Common Input Input Input Input Input Input Input Input Input Input Input Input +5V Power +5V Power Digital Common Digital Common Encoder C Chan. Pos. Encoder C Chan. Pos. Encoder Chan. Neg. Encoder C Chan. Neg. Encoder B Chan. Pos.
PMAC-PC Hardware Reference J7 JMACH2 (60-Pin Header) Continued Pin # Symbol Front View Function Description Notes 40 -LIM8 Input Positive End Limit 8 8,9 41 HMFL7 Input Home-Flag 7 10 42 HMFL8 Input Home-Flag 8 10 43 DAC5 Output Analog Out Pos. 5 4 44 DAC6 Output Analog Out Pos. 6 4 45 DAC5/ Output Analog Out Neg. 5 4,5 46 DAC6/ Output Analog Out Neg. 6 4,5 47 AENA5/DIR5 Output Amp-Enable/Dir. 5 6 48 AENA6/DIR6 Output Amp-Enable/Dir.
PMAC-PC Hardware Reference J8: Machine Port 1 Connector J8 JMACH1 (60-Pin Header) Front View Pin # Symbol Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 +5V +5V GND GND CHC3 CHC4 CHC3/ CHC4/ CHB3 CHB4 CHB3/ CHB4/ CHA3 CHA4 CHA3/ CHA4/ CHC1 CHC2 CHC1/ CHC2/ CHB1 CHB2 CHB1/ CHB2/ CHA1 CHA2 CHA1/ CHA2/ DAC3 DAC4 DAC3/ DAC4/ AENA3/DIR3 AENA4/DIR4 FAULT3 FAULT4 +LIM3 +LIM4 -LIM3 Output Output Common Common Input Input Input Input Input
PMAC-PC Hardware Reference J8 JMACH1 (60-Pin Header) (Continued) Pin # Symbol Front View Function Description Notes 40 -LIM4 Input Positive End Limit 4 8,9 41 HMFL3 Input Home-Flag 3 10 42 HMFL4 Input Home-Flag 4 10 43 DAC1 Output Analog Out Pos. 1 4 44 DAC2 Output Analog Out Pos. 2 4 45 DAC1/ Output Analog Out Neg. 1 4,5 46 DAC2/ Output Analog Out Neg. 2 4,5 47 AENA1/DIR1 Output Amp-Enable/Dir. 1 6 48 AENA2/DIR2 Output Amp-Enable/Dir. 2 6 49 FAULT1 Input Amp.-Fault 1 7 50 FAULT2 Input Amp.
PMAC-PC Hardware Reference J9 (JEQU): Position-Compare Connector J9 JEQU (10-Pin Connector) Front View Pin # Symbol Function Description Notes 1 EQU1/ Output Encoder 1 Comp.-Eq. Low is TRUE 2 EQU2/ Output Encoder 2 Comp.-Eq. Low is TRUE 3 EQU3/ Output Encoder 3 Comp.-Eq. Low is TRUE 4 EQU4/ Output Encoder 4 Comp.-Eq.
PMAC-PC Hardware Reference J31 (JUSB) Universal Serial Bus Port (Optional) Pin # Symbol Function 1 2 3 4 5 6 VCC DD+ GND Shell Shell N.C. DataData+ GND Shield Shield JS1: A/D Port 1 Connector JS1 (16-Pin Header) Front View Pin # Symbol Function 1 DCLK Output Description D to A, A to D Clock 2 BDATA1 Output D to A Data 3 ASEL0/ Output Channel Select Bit 0 4 ASEL1/ Output Channel Select Bit 1 5 CNVRT01 Output A to D Convert 6 ADCIN1 Input A to D Data 7 OUT1/ Output Chan.
PMAC-PC Hardware Reference JS2: A/D Port 2 Connector JS2 (16-Pin Header) Front View Pin # Symbol Function 1 DCLK Output D to A, A to D Clock Description 2 3 BDATA2 ASEL2/ Output Output D to A Data Chan. Select Bit 2 4 ASEL3/ Output Chan. Select Bit 3 5 CNVRT23 Output A to D Convert 6 ADCIN2 Input A to D Data 7 OUT5/ Output Amp-Enable/Dir. 8 OUT6/ Output Amp-Enable/Dir. 9 OUT7/ Output Amp-Enable/Dir. 10 OUT8/ Output Amp-Enable/Dir. 11 HF45 Input Amp. Fault 12 HF46 Input Amp.
PMAC-PC Hardware Reference 54 PMAC-PCI Base Board Connector Pinouts
PMAC-PCI Hardware Reference SOFTWARE SETUP Communications Delta Tau provides communication tools that take advantage of the PCI bus Plug and Play feature of 32bits Windows© based computers. Starting with MOTIONEXE.EXE version 10.32.00, which is included in Pewin32 version 2.32 and newer, a PMAC2 PCI board plugged in a PCI bus slot will be recognized by the operating system when the computer is boot up.
PMAC-PCI Hardware Reference On a Flex CPU board configured for Option 5CF with 80 MHz maximum frequency, I46 should be set to 7 to operate the CPU at its maximum rated frequency. On a Flex CPU board configured for Option 5EF with 160 MHz maximum frequency, I46 should be set to 15 to operate the CPU at its maximum rated frequency.
PMAC-PCI Hardware Reference • If the saved value of I46 is 0, so the CPU’s operational frequency is determined by jumper settings, then the serial baud rate is determined by a combination of the setting of jumpers E44E47 and the CPU frequency on a PMAC(1) board, as shown in the following table. These settings maintain backward compatibility.
PMAC-PCI Hardware Reference For a PMAC2 board with a saved value of 0 for I46, the serial baud rate is determined by the combination of I54 and the CPU frequency on a PMAC2 board as shown in the following table. These settings maintain backward compatibility. I54 Baud Rate for Baud Rate for Baud Rate for 40 MHz CPU 60 MHz CPU 80 MHz CPU 0 600 DISABLED 1200 1 900* (-0.05%) 900 1800* (-0.1%) 2 1200 1200 2400 3 1800* (-0.1%) 1800 3600* (-0.19%) 4 2400 2400 4800 5 3600* (-0.
PMAC-PCI Hardware Reference To check the value of the multiplier, use the on-line command RHX:$FFFD and look at the last hexadecimal digit. The actual multiplier is one greater than the value in this last digit. Alternately, define an M-variable such as M99->X:$FFFD,0,4 and then read from or write to these bits with the M-variable. E48 X:$FFFD; 0-3 True Multiplier DSP Frequency OFF ON 1 2 x2 x3 40 MHz 60 MHz When PMAC is ordered with the CPU Option 5C it is capable to run at 80 MHz frequency.
PMAC-PCI Hardware Reference P1=0 WHILE (P1<360) M10=$A000+P1 M0=SIN(P1) P1=P1+1 ENDWHILE ; Sets address that M0 points to ; Puts value in register that M0 points to Note that this technique is not possible with L-variables in compiled PLCs (but it is possible with Mvariables in compiled PLCs). Physically, the Option 16 memory is a 16k x 24 bank of battery-backed static RAM. It maps into the PMAC and PMAC2 at addresses $A000 to $BFFF, on both the X and Y data buses, an 8k x 48 block of address space.
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