User's Manual

PMAC VME Hardware Reference Manual
8 PMAC VME E-Point Descriptions
E48: CPU Clock Frequency Control (Option CPU Section)
E48 controls the CPU clock frequency only on PMAC with an option CPU section using flash memory
backup (no battery). This CPU section is used on PMACs ordered with Opt 4A, 5A, or 5B (not Option 5).
E Point and
Physical Layout
Location Description Default
E48
C2 Jump pins 1 and 2 to multiply crystal
frequency by 3 inside CPU for 60 MHz
operation.
Remove jumper to multiply crystal frequency
by 2 inside CPU for 40 MHz operation.
Jumper installed
(Option 5, 5B)
Jumper not installed
(Standard, Option
4A, 5A)
It may be possible to operate a board with 40 MHz components (Option 5A) at 60 MHz under some
conditions by changing the setting of jumper E48. However, this operates the components outside of their
specified operating range, and proper execution of PMAC under these conditions is not guaranteed. PMAC
software failure is possible, even probable, under these conditions, and this can lead to very dangerous
machine failure. Operation in this mode is done completely at the user’s own risk; Delta Tau can accept no
responsibility for the operation of PMAC or the machine under these conditions.
E49: Serial Communications Parity Control
E Point and
Physical Layout
Location Description Default
E49
D3 Jump pin 1 to 2 for NO serial parity.
Remove jumper for ODD serial parity.
Jumper installed
E50: EAROM Save Enable/Disable
E Point and
Physical Layout
Location Description Default
E50
D3 Jump pin 1 to 2 to enable save to EAROM.
Remove jumper to disable save to EAROM.
Jumper installed
E51: Normal/Re-Initializing Power-Up
E Point and
Physical Layout
Location Description Default
E51
D3 Jump pin 1 to 2 to re-initialize ON power-
up/reset.
Remove jumper for NORMAL power-up/reset.
No jumper
installed
E52 - E53: DSP Interrupt Signal Select
E Point and
Physical Layout
Location Description Default
E52
B5 Jump pin 1 to 2 to allow LIRQ0 to interrupt
local DSP-CPU at IRQB.
Jumper installed
E53
B5 Jump pin 1 to 2 to allow MI3 to interrupt local
DSP-CPU at IRQB.
No jumper
installed