Reference Manual

PMAC 2 Software Reference
PMAC Saved Setup Registers 385
This resolver conversion is a direct, and not a tracking, conversion. As such, it is more dynamically
responsive, but also more susceptible to measurement noise. If a more noise-immune result is desired, at
the cost of some dynamic responsiveness (but still no steady-state tracking errors), a digital tracking filter
can be implemented on this result with another conversion table entry (format $D8). The result of that
filter entry can then be used as the feedback or master data.
High-Resolution Interpolator Entries ($F): An ECT entry in which the first hex digit of the first line is
$F processes the result of a high-resolution interpolator for analog “sine-wave” encoders, such as the
ACC-51. This entry, when used with a high-resolution interpolator, produces a value with 4096 states per
line. The entry must read both an encoder channel for the whole number of lines of the encoder, and a
pair of A/D converters to determine the location within the line, mathematically combining the values to
produce a single position value.
Encoder Channel Address: The first line of the two-line entry contains $F in the first hex digit and the
base address of the encoder channel to be read in the low 16 bits (bits 0 to 15). If bit 19 of the line is set
to 0 (making the second hex digit $0), PMAC expects a PMAC(1)-style Servo IC on the interpolator, as
in the ACC-51P. If bit 19 is set to 1 (making the second hex digit $8), PMAC expects a PMAC2-style
Servo IC for the interpolator, as in the ACC-51S for the PMAC2A-PC/104.
The following table shows the possible entries when PMAC(1)-style Servo ICs are used, as in the ACC-
51P.
High-Res Interpolator Entry First Lines for ACC-51P
Channel Entry Channel Entry Channel Entry Channel Entry
9 $F0C020 11 $F0C028 13 $F0C030 15 $F0C038
10 $F0C024 12 $F0C02C 14 $F0C034 16 $F0C03C
The next table shows the possible entries for the ACC-51S, which uses the Servo ICs of the PMAC2A-
PC/104 main board and the ACC-1P Axis 5-8 board:
High-Res Interpolator Entry First Lines for ACC-51S
Channel Entry Channel Entry Channel Entry Channel Entry
1 $F8C000 3 $F8C010 5 $F8C020 7 $F8C030
2 $F8C008 4 $F8C018 6 $F8C028 8 $F8C038
A/D Converter Address: The second line of the entry contains $00 in the first two hex digits and the base
address of the first of two A/D converters to be read in the low 16 bits (bits 0 to 15, the last four hex
digits). The second A/D converter will be read at the next higher address. The following table shows the
possible entries when the ACC-51P is used:
High-Res Interpolator Entry Second Lines for ACC-51P
Channel Entry Channel Entry Channel Entry Channel Entry
9 $00C022 11 $00C02A 13 $00C032 15 $00C03A
10 $00C026 12 $00C02E 14 $00C036 16 $0FC03E
The next table shows the possible entries when the ACC-51S is used:
High-Res Interpolator Entry Second Lines for ACC-51S
Channel Entry Channel Entry Channel Entry Channel Entry
1 $00FFC0 3 $00FFC4 5 $00FFC8 7 $00FFCC
2 $00FFC2 4 $00FFC6 6 $00FFCA 8 $00FFCE
ResultWord: The output value of the high-resolution sinusoidal encoder conversion is placed in the 24-bit
X-register of the second line of the conversion table entry. Bit 0 of the result contains the LSB of the