Reference Manual

PMAC 2 Software Reference
PMAC Saved Setup Registers 393
PMAC2 Servo IC Setup Bits and Registers
A few setup bits and registers in PMAC2 Servo ICs are not assigned I-variables, but still can be set and
saved like I-variables.
X:$C005 etc. Bit 17 Encoder n Third-Channel Demux Control
{PMAC2 only}
Range: 0 .. 1
Units: none
Default: 0
Note
In V1.17 and newer firmware, this bit has been incorporated into I9n5.
Bit 17 of a hardware channel’s control word permits the “de-multiplexing” of the U, V, and W hall
commutation sensor bits from the index-channel input for the encoder in the style of the Yaskawa
incremental encoders. When bit 17 is set to 1, the U, V, W, and index (“Z”) states are broken out of the
third-channel (“C”) input according to the four possible AB-quadrature states as shown in the following
table:
A B C
1 1 Z
1 0 U
0 0 V
0 1 W
When bit 17 is set to 0, no de-multiplexing for the channel, and the U, V, W, and C input lines for the
channel each feed their own status bits.
The addresses for the control word of each channel are:
Channel Control
Word
Address
Channel Control
Word
Address
Channel Control
Word
Address
Channel Control
Word
Address
1 X:$C005 3 X:$C015 5 X:$C025 7 X:$C035
2 X:$C00D 4 X:$C01D 6 X:$C02D 8 X:$C03D
The U, V, and W states can be read in bits 22, 21, and 20, respectively, of the channel’s status word in the
Servo ASIC. The index channel state can be read in bit 14 of the channel’s status word; the state can be
used automatically in the capture logic for the channel.
Bit 3 of the channel’s status word is set to 1 until all four AB-quadrature states have been seen. The user
should not attempt to use the de-multiplexed UVW state for brushless motor phasing until this bit has
been cleared to 0.
X:$C005 etc. Bit 18 Encoder n Hardware 1/T Enable {PMAC2 only}
Range: 0 .. 1
Units: none
Default: 0
Note
In V1.17C and newer firmware, this bit can be accessed as I9n9.