Reference Manual
PMAC 2 Software Reference
420 PMAC I/0 and Memory Map
PMAC2 DSPGATE1 Servo IC Registers
Chan #
1 2 3 4 5 6 7 8
Hex
[$C000] [$C008] [$C010] [$C018] [$C020] [$C028] [$C030] [$C038]
Decimal
49152 49160 49168 49176 49184 49192 49200 49208
Chan #
9 10 11 12 13 14 15 16
Hex
[$C040] [$C048] [$C050] [$C058] [$C060] [$C068] [$C070] [$C078]
Decimal
49216 49224 49232 49240 49248 49256 49264 49272
Note:
• Channels 1-4, residing in the first DSPGATE1 IC, are present on all PMAC2
boards.
• Channels 5-8, residing in the second DSPGATE1 IC, are present on PMAC2
boards with Option 1.
• Channels 9-12, residing in the third DSPGATE1 IC, are present on PMAC2
systems with a 4-channel PMAC2 ACC-24x2 daughter board.
• Channels 13-16, residing in the fourth DSPGATE1 IC, are present on PMAC2
systems with an 8-channel ACC-24x2 daughter board.
Y:$Cxxx
Channel n Time between last two encoder counts
(SCLK cycles)
Bits
0-22 Timer (units of SCLK cycles)
23 Change-of-direction flag
Note: Alternate use if Channel Control Word bit 18 is set to 1 (Rev “D” or newer IC only):
Channel n Timer-Based Fractional Count Data (unsigned)
0-11 Compare “B” fractional count (bit 11 = ½-count; bit 10
= ¼-count; etc.)
12-23 Flag-captured fractional count (bit 23 = ½-count; bit 22
= ¼-count; etc.)
X:$Cxxx
Channel n Status Word (all bits read-only except bits 7
& 8)
0-2 Capture Hall Effect Device State
3 Invalid demultiplex of C, U, V, & W
4-6 Reserved for future use (reports as 0)
7 Encoder Loss Error (latched at 1 if Tn=Un or Vn=Wn;
cleared to 0 by writing 0 to this bit)
8 Encoder Count Error (latched at 1 on illegal encoder
transition; cleared to 0 by writing to this bit or resetting
counter)
9 Position Compare (EQUn) output value
10 Position-Captured-On-Gated-Index Flag (=0 on read of
captured position register, =1 on trigger capture)
11 Position-Captured Flag (on any trigger) (=0 on read of
captured position register, =1 on trigger capture)
12 Encoder Channel A (CHAn) Input Value
13 Encoder Channel B (CHBn) Input Value
14 Encoder Channel C (Index, CHCn) Input Value
(ungated)
15 Amplifier Fault (FAULTn) Input Value
16 Home Flag (HMFLn) Input Value
17 Positive End Limit (PLIMn) Input Value