Reference Manual

PMAC 2 Software Reference
PMAC I/0 and Memory Map 445
VME-Bus Registers (PMAC(1)-VME, PMAC2-VME, PMAC2-VME
Ultralite only)
$E000 - $EFFF
Used for VME-bus functions (57344 - 61439)
Y:$E000
VME Mailbox Register 0 (Bits 0-7)
Y:$E001
VME Mailbox Register 1 (Bits 0-7)
Y:$E002
VME Mailbox Register 2 (Bits 0-7)
Y:$E003
VME Mailbox Register 3 (Bits 0-7)
Y:$E004
VME Mailbox Register 4 (Bits 0-7)
Y:$E005
VME Mailbox Register 5 (Bits 0-7)
Y:$E006
VME Mailbox Register 6 (Bits 0-7)
Y:$E007
VME Mailbox Register 7 (Bits 0-7)
Y:$E008
VME Mailbox Register 8 (Bits 0-7)
Y:$E009
VME Mailbox Register 9 (Bits 0-7)
Y:$E00A
VME Mailbox Register A (Bits 0-7)
Y:$E00B
VME Mailbox Register B (Bits 0-7)
Y:$E00C
VME Mailbox Register C (Bits 0-7)
Y:$E00D
VME Mailbox Register D (Bits 0-7)
Y:$E00E
VME Mailbox Register E (Bits 0-7)
Y:$E00F
VME Mailbox Register F (Bits 0-7)
PMAC2 I/O Control Registers
PCI/ISA Bus PMAC2 Versions (PMAC2-PCI, PMAC2-PC, PMAC2-Lite,
PMAC2-PC UltraLite):
X/Y:$E800
I/O Buffer IC Direction Control
Bits
0 OUT0: Buffer direction control for I/O00 to I/O07 on JIO
1 OUT1: Buffer direction control for I/O08 to I/O15 on JIO
2 OUT2: Buffer direction control for I/O16 to I/O23 on JIO
3 OUT3: Buffer direction control for I/O24 to I/O31 on JIO
4 OUT4: Buffer direction control for DAT0 to DAT7 on JTHW
5 OUT5: Buffer direction control for SEL0 to SEL7 on JTHW
6 OUT6: Buffer direction control for DISP0 to DISP7 on JDISP,
inverted as R/W- output on JDISP (pin 5)
7 OUT7: Inverted as E output on JDISP
X/Y:$E801
Auxiliary I/O points
0 OUT8: Inverted as RS output on JDISP
1 XIN_1: Jumper E1 input (phase/servo clock direction control)
2 XIN_2: Jumper E2 input (40/60 MHz control)
3 XIN_3: Jumper E3 input (re-initialize on reset)
4 XIN_4: Jumper E4 input
5 XIN_5: Jumper E5 input
6 XIN_6: Jumper E6 input
7 XIN_7: Option 12 ADC convert status