Reference Manual

PMAC 2 Software Reference

PMAC I-Variable Specification 53

number of turns (electrical cycles) the first resolver makes in one full turn (electrical cycle)

of the second resolver.

This parameter is used only during PMAC’s power-up/reset cycle to establish absolute

power-on servo position. Therefore, the parameter must be set, the value stored in

EAROM with the SAVE command, and the card reset before it takes effect.

If there is no geared second resolver on Motor x, or if absolute power-on position is not

desired, I9x should be set to zero. If Ix10 (for the primary resolver) is set to zero, I9x is

not used. In a triple-resolver system, I9x must be set greater than zero in order for I8x

(third-resolver gear ratio) to be used.

The second resolver must be connected to the next higher numbered R/D converter at the

same multiplexer address than the first resolver. If there is a third resolver, it must be

connected to the next higher numbered converter at the same multiplexer address than the

second resolver. There can be up to eight R/D converters on two ACC-8D Option 7

boards at one multiplexer address.

If Ix10 is set up for an ACC-8D Option 9 Yaskawa encoder converter, I9x represents the

counts per revolution (including x2 or x4 quadrature decode, if used) of the encoder;

effectively it is the “gear ratio” between the encoder and the revolution counter.

Example

Motor 1 has a double resolver with the fine resolver connected to the R/D converter at

location 2 on an ACC-8D Option 7 board set to multiplexer address 4, and the coarse

resolver, geared down at a 36:1 ratio from the fine resolver, connected to the R/D

converter at location 3 on the same board. The following I-variable settings should be

used:

I110=$020004 .... ; Value of $0004 in low 16 bits specifies

............................ ; multiplexer address 4; $02 in high 8 bits

............................ ; specifies R/D at location 2 of this address

I91=36 ................ ; Specify 36 turns of fine resolver per turn of

............................ ; coarse resolver; R/D must be at location 3

............................ ; of multiplexer address 4

I81=0 .................. ; No third resolver