Reference Manual

PMAC 2 Software Reference
66 PMAC I-Variable Specifiation
Parallel Data Read: If Ix10 contains a value from $08xxxx to $30xxxx, from $48xxxx to
$70xxxx, from $88xxxx to $B0xxxx, or from $C8xxxx to $F0xxxx, Motor x will do a parallel
data read of the PMAC memory or I/O register at address ‘xxxx’.
In this mode, bits 16 to 21 of Ix10 specify the number of bits to be read, starting with bit 0 at
the specified address. In this mode, they can take a value from $08 to $30 (8 to 48). If the
number of bits is greater than 24, the high bits are read from the register at the next higher-
numbered address.
In this mode, bit 22 of Ix10 specifies whether a Y-register is to be read, or an X-register. A
value of 0 in this bit specifies a Y-register; a value of 1 specifies an X-register. Almost all
common sources of absolute position information are located in Y-registers, so this digit is
almost always 0.
Bit 23 of Ix10 specifies whether the position is interpreted as an unsigned or a signed value. If
the bit is set to 0, it is interpreted as an unsigned value, if the bit is 1, it is interpreted as a
signed value.
Combining these components, Ix10 values in this mode can be summarized as:
• $08xxxx - $30xxxx: Parallel Y-register read, unsigned value, 8 to 48 bits
• $48xxxx - $70xxxx: Parallel X-register read, unsigned value, 8 to 48 bits
• $88xxxx - $B0xxxx: Parallel Y-register read, signed value, 8 to 48 bits
• $C8xxxx - $F0xxxx: Parallel X-register read, signed value, 8 to 48 bits
The following table shows Ix10 values for parallel data read through an ACC-14 board.
Register Ix10 Register Ix10
1
st
ACC-14D/V Port A $xxFFD0 4
th
ACC-14D/V Port A $xxFFE8
1
st
ACC-14D/V Port B $xxFFD1 4
th
ACC-14D/V Port B $xxFFE9
2
nd
ACC-14D/V Port A $xxFFD8 5
th
ACC-14D/V Port A $xxFFF0
2
nd
ACC-14D/V Port B $xxFFD9 5
th
ACC-14D/V Port B $xxFFF1
3
rd
ACC-14D/V Port A $xxFFE0 6
th
ACC-14D/V Port A $xxFFF8
3
rd
ACC-14D/V Port B $xxFFE1 6
th
ACC-14D/V Port B $xxFFF9
‘xx’ represent the first two digits, which control bit width, and signed vs.
unsigned data. ACC-14 boards are always Y-addresses
For reading MLDT absolute position from a PMAC timer register, the first two hex digits of
Ix10 are set to $58. Bits 16 – 21 are set to $18 to specify a 24-bit register; bit 22 is set to 1
($40) to specify an X-register, and bit 23 is set to 0 to specify an unsigned value.
The following table shows Ix10 values for reading ACC-29 MLDT timer registers on a
PMAC(1) as parallel data:
Channel Ix10 Channel Ix10
9 $58C020 13 $58C030
10 $58C024 14 $58C034
11 $58C028 15 $58C038
12 $58C02C 16 $58C03C
The following table shows Ix10 values for reading PMAC2 built-in MLDT timer registers:
Channel Ix10 Channel Ix10
1 $58C000 5 $58C020
2 $58C008 6 $58C028
3 $58C010 7 $58C030
4 $58C018 8 $58C038