Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Suggested M-Variable Definitions 572
Servo IC 2 Registers for First Acc-24 Channel 3 (usually for Motor #11)
M1101->X:$078209,0,24,S ; ENC3 24-bit counter position
M1102->Y:$07820B,8,16,S ; DAC3 16-bit analog output
M1103->X:$07820B,0,24,S ; ENC3 capture/compare position register
M1105->Y:$07820E,8,16,S ; ADC3 16-bit analog input
M1106->Y:$078208,0,24,U ; ENC3 time between counts (SCLK cycles)
M1110->X:$078208,10,1 ; ENC3 count-write enable control
M1111->X:$078208,11,1 ; EQU3 compare flag latch control
M1112->X:$078208,12,1 ; EQU3 compare output enable
M1113->X:$078208,13,1 ; EQU3 compare invert enable
M1114->X:$078208,14,1 ; AENA3/DIR3 Output
M1116->X:$078208,16,1 ; EQU3 compare flag
M1117->X:$078208,17,1 ; ENC3 position-captured flag
M1118->X:$078208,18,1 ; ENC3 Count-error flag
M1119->X:$078208,19,1 ; ENC3 3rd channel input status
M1120->X:$078208,20,1 ; HMFL3 input status
M1121->X:$078208,21,1 ; -LIM3 (positive end) input status
M1122->X:$078208,22,1 ; +LIM3 (negative end) input status
M1123->X:$078208,23,1 ; FAULT3 input status
Motor #11 Status Bits
M1130->Y:$0005C0,11,1 ; #11 Stopped-on-position-limit bit
M1131->X:$0005B0,21,1 ; #11 Positive-end-limit-set bit
M1132->X:$0005B0,22,1 ; #11 Negative-end-limit-set bit
M1133->X:$0005B0,13,1 ; #11 Desired-velocity-zero bit
M1135->X:$0005B0,15,1 ; #11 Dwell-in-progress bit
M1137->X:$0005B0,17,1 ; #11 Running-program bit
M1138->X:$0005B0,18,1 ; #11 Open-loop-mode bit
M1139->X:$0005B0,19,1 ; #11 Amplifier-enabled status bit
M1140->Y:$0005C0,0,1 ; #11 Background in-position bit
M1141->Y:$0005C0,1,1 ; #11 Warning-following error bit
M1142->Y:$0005C0,2,1 ; #11 Fatal-following-error bit
M1143->Y:$0005C0,3,1 ; #11 Amplifier-fault-error bit
M1144->Y:$0005C0,13,1 ; #11 Foreground in-position bit
M1145->Y:$0005C0,10,1 ; #11 Home-complete bit
M1146->Y:$0005C0,6,1 ; #11 Integrated following error fault bit
M1147->Y:$0005C0,5,1 ; #11 I2T fault bit
M1148->Y:$0005C0,8,1 ; #11 Phasing error fault bit
M1149->Y:$0005C0,9,1 ; #11 Phasing search-in-progress bit
Motor #11 Move Registers
M1161->D:$000588 ; #11 Commanded position (1/[Ixx08*32] cts)
M1162->D:$00058B ; #11 Actual position (1/[Ixx08*32] cts)
M1163->D:$0005C7 ; #11 Target (end) position (1/[Ixx08*32] cts)
M1164->D:$0005CC ; #11 Position bias (1/[Ixx08*32] cts)
M1166->X:$00059D,0,24,S ; #11 Actual velocity (1/[Ixx09*32] cts/cyc)
M1167->D:$00058D ; #11 Present master pos (1/[Ixx07*32] cts)
M1168->X:$0005BF,8,16,S ; #11 Filter Output (16-bit DAC bits)
M1169->D:$000590 ; #11 Compensation correction (1/[Ixx08*32] cts)
M1170->D:$0005B4 ; #11 Present phase position (including fraction)
M1171->X:$0005B4,24,S ; #11 Present phase position (counts *Ixx70)
M1172->L:$0005D7 ; #11 Variable jog position/distance (cts)
M1173->Y:$0005CE,0,24,S ; #11 Encoder home capture position (cts)