User's Manual

Turbo PMAC User Manual
Turbo PMAC Family Overview 7
Status variable I4908 contains the address of the next register past last word of unreserved data memory.
If no UBUFFER has been defined, this is the address one greater than the last word of data memory.
With the standard memory configuration, no UBUFFER is defined on re-initialization. With the extended
memory configuration, a UBUFFER of 65,536 words – from X/Y:$030000 - $03FFFF – is defined
automatically on re-initialization.
Flash Memory
Turbo PMAC’s non-volatile memory storage is contained in a flash-memory IC. Flash-memory ICs
retain their contents without applied power. However, they are relatively slow in access times, so Turbo
PMAC does not use the flash IC in ongoing operation. Instead, during power-up/reset, it copies the
contents of the flash memory into fast SRAM so the processor can access it quickly. The flash memory is
only written to upon a SAVE command, or when new firmware is downloaded.
The flash memory provides non-volatile storage for both the firmware created by Delta Tau, and the
programs, variable values, and other settings created by the user. The flash memory IC is sized
depending on the active memory capacity so as to be able to store the entire contents of the active
memory. Status variables I4904 and I4909 both contain information as to what size of flash memory is
present.
Copying user settings to flash memory with the SAVE command takes several seconds during which some
other tasks, including several safety checks, are not performed; this should not be done while the machine
is in actual operation. As Turbo PMAC is copying saved data from flash memory to active SRAM during
a power-up/reset, it is evaluating the checksum of this data and comparing it to the checksum calculated
during the last SAVE operation. If there is a discrepancy, it will revert the settings in active memory to
factory default values, as if the card had been re-initialized, and set the Flash Read Error (a.k.a. “EAROM
error) status bit at X:$000006 bit 21, part of the ??? global status query word.
Optional Battery-Backed Parameter Memory
If Option 16A is ordered, the Turbo CPU section is provided with an additional bank of 32k 24-bit words
(mapped as 16k 48-bit words) of data-memory SRAM that is battery-backed (BBRAM) and can be used
for parameter storage. Typically, this memory bank is used to store machine-state information without
the need for a lengthy SAVE command.
The low-power SRAM that can be powered from batteries for lengthy periods is slower than the SRAM
ICs used for the main memory, so the user should be aware that significant use of this memory bank
might incur a noticeable computational speed penalty. P-variable and/or Q-variable storage can be moved
from fast main memory to the battery-backed memory by changing I46 from its default value of 0. This
provides automatic retention of the variable values at the cost of slower access. More commonly,
registers in the BBRAM are just accessed with M-variable as pointers. BBRAM registers start at
X/Y:$050000.
Although the expected average battery life for the lithium battery that retains this memory is five years or
more, a yearly replacement schedule is recommended. There is a super-capacitor capable of retaining the
contents of the memory for several minutes without the battery, so a battery change can be done without
power applied to the controller.
Turbo PMAC register X:$00003F contains the address of the end register of BBRAM. It will report a
value of $050000 if there is no BBRAM present. It will report a value of $054000 if the Option 16A
BBRAM is present. It will report a value of $060000 if extended BBRAM is present (Turbo PMAC
designs support this but it is not being sold at this time).