Datasheet

ENS160 Datasheet v0.95 preliminary / December 2020
33
17 Application Information
17.1 I
2
C Operation Circuitry
The recommended application circuit for the ENS160 I
2
C interface operation is shown below:
Figure 18: Recommended Application Circuit (I
2
C Operation)
Note(s):
1. CSn must be pulled high (directly to V
DDIO
) to ensure I
2
C interface is selected
2. MISO/ADDR should be pulled low or high to specify the LSB of the address
3. Pull-up resistors
The above recommendation for pull-up resistance values applies to I
2
C standard mode
only. Pull-up resistors for SCL and SDA are assumed to be part of the host system and
should be selected dependent on the intended I
2
C data rate and individual bus
architecture.
4. Decoupling capacitor must be placed close to the V
DD
(Pin 4) and V
DDIO
(Pin 5) supply
pins of the ENS160
ENS160
V
DD
Host
Processor
V
DDIO
7 CSn
1 SDA
2 SCL
6 INTn
3 ADDR
SDA
SCL
INTn
5
4
8, 9
GND
4k7
4k7
100nF 10mF
GND
GND