User's Manual

UM-B-045

DA14580 Range extender v.2 reference application

Company confidential

User manual

Revision 1.1

14-September-2015

CFR0012-00 Rev 1

11 of 60

Figure 3: Sky66111-11 Power Amplifier

Bluetooth SoC 4.3

The DA14580 integrated circuit has a fully integrated radio transceiver and baseband processor for

Bluetooth ® Smart. It can be used as an application processor as well as a data pump in systems

with an external processor.

The DA14580 contains an embedded One-Time-Programmable (OTP) memory for storing Bluetooth

profiles as well as custom application code. The qualified Bluetooth® Smart protocol stack, which is

stored in a dedicated ROM, and the customer application software which is stored in system RAM,

run on the embedded ARM Cortex M0 processor. Low leakage Retention RAM is used to store

sensitive data and connection information while in Deep Sleep mode.

The Radio Transceiver implements the RF part of the Bluetooth Smart protocol. Together with the

Bluetooth 4.0 PHY layer, it provides a 93 dB RF link budget for reliable wireless communication. All

RF blocks are supplied by on-chip low drop out regulators (LDOs). The RF port is single ended 50 ,

so no external balun is required.

The DA14580 has dedicated hardware for the Link Layer implementation of Bluetooth® Smart and

interface controllers for enhanced connectivity capabilities.

The reset line of the DA14580 (pin RST) is active high. On this module the RST pin is available on

module pin 21.

Main debug port for the DA14580 is the JTAG. JTAG consists of two signals, SWDIO and SWCLK.

The frequency tolerance specification for BLE is 50 ppm. In order to compensate ageing and offset

effects, an external crystal shall have an accuracy of ±15 ppm or better. The DA14580 crystal (Y1)

has a fundamental frequency of 16 MHz and load capacitance not higher than 10 pF. The crystal is

located on the module itself. Also, an internal programmable capacitance bank is available in the

DA14580. In this way, the crystal oscillator frequency can be tuned.

For sleep mode the on chip RCX oscillator is utilized. In addition, a 32 kHz crystal (Y2) with a

tolerance of 50 ppm (500 ppm max) can be assembled on the module. The crystal load capacitance

shall not be higher than 10 pF.

The external digital interfaces available for the module are:

● 2 UARTs with hardware flow control up to 1 MBd

● SPI interface

● I2C bus at 100 kHz, 400 kHz