User's Manual
Table Of Contents
- 1.0 Connection diagram
- 2.0 Introduction
- 3.0 Specifications
- 3.1 GENERAL
- 3.2 ABSOLUTE MAXIMUM RATINGS
- 3.3 Operating Conditions
- 3.4 Digital Input/Output Pins
- 3.5 ULTRA LOW ENERGY (ULE) I/O PIN
- 3.6 SUPPLY CURRENTS
- 3.7 Analog Front End
- Table 10: Microphone amplifier
- Table 11: Microphone amplifier (Operating Condition)
- Table 12: Microphone supply voltages
- Table 13: VREFp load circuit
- Table 14: LSRp/LSRn outputs
- Table 15: LSRp/LSRn load circuits
- Table 16: PAOUTp, PAOUTn outputs
- Table 17: PAOUTp, PAOUTn outputs (Note 21)
- Table 18: PAOUTp, PAOUTn external components
- 3.8 Battery management
- 3.9 Baseband Part
- 3.10 Radio (RF) Part
- 3.11 RF Power supply
- 3.12 RF channel frequencies
- 4.0 Design guidelines
- 5.0 Notices to OEM
- 6.0 Package information
- 7.0 Revision history
SC14SPNODE SF DECT Module with integrated Antenna and FLASH
© 2012 Dialog Semiconductor B.V. 16 Jul 1, 2014 v1.6
Note 20: 0 dBm0 on CIN = -3.14 dB of max PCM value.
Table 13: VREFp load circuit
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Cload_vrefp VREFp (parasitic) load
capacitance
20 pF
Iout_vrefp VREFp output current 1 mA
Figure 8 VREFp load circuit
C
load_vrefp
VREFp
VREFm
Iout_vrefp
Rout_vrefp
Table 14: LSRp/LSRn outputs
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Vlsr_0dB_unt Untrimmed differen-
tial RMS output volt-
age between LSRp
and LSRn in audio
mode (0 dBm0 refer-
ence level)
0 dBm0 on CIN (Note 20),
LSRATT[2:0] = 001,
@ 1020 Hz Load circuit A (see
Figure 9, Table 15) with RL1=
, Cp1 or load circuit B (see
Figure 10) with RL2, Cp2 and
Cs2
Tolerance:
• 13% when untrimmed
(
BANDGAP_REG=8)
• 6% when trimmed
(Note 18)
621 714 807 mV
Rout_lsr Resistance of acti-
vated loudspeaker
amplifier outputs
LSRp and LSRn
1
Vlsr_dc DC offset between
LSRp and LSRn
(Note 8)
LSRATT[2:0] = 3
R
L1
= 28
3 sigma deviation limits
-20 20 mV