User's Manual
Table Of Contents
- About the Modules
- What’s on the Module?
- About the Development Board
- Basic description
- Switches and buttons
- I2C and SPI header connectors
- Serial port connectors
- VGA connector / External LCD clock
- Development board SO-DIMM connector, P15
- Application-specific expansion headers - P16 and P17
- LCD application board header, P18
- USB Device application header, P32
- Digital I/O, P19
- Power over Ethernet (PoE) connectors
- Through-hole prototyping (wrap-field) area, P3 and P4
- Development board LEDs
- Current Measurement Option (CMO)
- Power jack, P12
- Test points
- Factory default interface configuration for development board
- LCD and USB Configuration
- Module Specifications
- Mechanical dimensions
- Environmental information
- Network interface
- Power requirements
- Real-time clock
- I2C signals
- USB interface
- Module reset
- Module / SO-DIMM signal characteristics
- Electrical characteristics
- DC electrical characteristics
- USB internal PHY DC electrical inputs and outputs
- Antenna information
- Antenna specifications - 2 dBi Dipole
- Antenna specifications - 5 dBi Dipole
- Antenna specifications - 2 dBi PCB mount
- FCC RF radiation exposure statement
- Safety statements
- Dimensions and PCB Layouts
- Certifications
. . . . .
WHAT’S ON THE MODULE?
JTAG 20-pin header connector, P2
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JTAG 20-pin header connector, P2
The JTAG connector is a standard, male, ARM 20-pin pinout in a miniature
connector, with a 50-mil pitch. A JTAG adapter, which ships with each Jump Start
kit, expands the JTAG connector to a 100 mil pitch. Use the included JTAG adapter
to connect the debugger.
The JTAG connector on the module is keyed, as are the two connectors on the JTAG
adapter, which means there is only one way to attach ribbon cables to the module
and JTAG adapter. For details, see “JTAG adapter assembly” on page 16.
Pin assignment
JTAG header connector, P2
Pin Signal Description
1 3.3V ARM9 I/O supply
2 3.3V ARM9 I/O supply
3 TRST# Test mode reset
4 GND Ground
5 TDI Test data in
6 GND Ground
7 TMS Test mode select
8 GND Ground
9TCK Test clock
10 GND Ground
11 RTCK Returned test clock (ARM core only)
12 GND Ground
13 TDO Test data out
14 GND Ground
15 DBSRST# System reset
16 GND Ground