User's Manual
Table Of Contents
- About the Modules
- What’s on the Module?
- About the Development Board
- Basic description
- Switches and buttons
- I2C and SPI header connectors
- Serial port connectors
- VGA connector / External LCD clock
- Development board SO-DIMM connector, P15
- Application-specific expansion headers - P16 and P17
- LCD application board header, P18
- USB Device application header, P32
- Digital I/O, P19
- Power over Ethernet (PoE) connectors
- Through-hole prototyping (wrap-field) area, P3 and P4
- Development board LEDs
- Current Measurement Option (CMO)
- Power jack, P12
- Test points
- Factory default interface configuration for development board
- LCD and USB Configuration
- Module Specifications
- Mechanical dimensions
- Environmental information
- Network interface
- Power requirements
- Real-time clock
- I2C signals
- USB interface
- Module reset
- Module / SO-DIMM signal characteristics
- Electrical characteristics
- DC electrical characteristics
- USB internal PHY DC electrical inputs and outputs
- Antenna information
- Antenna specifications - 2 dBi Dipole
- Antenna specifications - 5 dBi Dipole
- Antenna specifications - 2 dBi PCB mount
- FCC RF radiation exposure statement
- Safety statements
- Dimensions and PCB Layouts
- Certifications
LCD AND USB CONFIGURATION
LCD displays
60 ConnectCore 9c/Wi-9C Hardware Reference, Rev. B 01/2007
4
LCD controller
control pins
LCD controller
data pins
Note:
Double-panel displays use twice as many pins but do not offer more color or
gray shades.
Colors and gray
shades
The number of colors and gray shades correlates with the number of data pins but
also depends on color processing techniques and data-shifting techniques.
For exact values, see the NS9360 Hardware Reference, LCD Controller chapter,
“Number of Colors” and “Grayscaler.” You can access the NS9360 Hardware
Reference through the Jump Start Kit.
Pin # Signal name Type Description
89 CLPOWER Output LCD panel power enable
87 CLLP (HSYNC) Output Line synchronization pulse (STN)/horizontal synchronization pulse
(TFT)
46 CLCP Output LCD panel clock
44 CLFP Output Frame pulse (STN)/vertical synchronization pulse (TFT)
42 CLAC Output STN AC bias drive or TFT data enable output
38 CLLE Output Line end signal
Display type Number of data pins: Panel 1 Number of data pins: Panel 2
TFT—Color only
Color 18-bit 18 Not applicable
STN—Color
Single panel 8-bit 8 Not applicable
Dual panel 8-bit 8 8
STN—Monochrome
Single panel 4-bit 4 Not applicable
Dual panel 4-bit 4 4
Single panel 8-bit 8 Not applicable
Dual panel 8-bit 8 8