User Manual

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Programming Considerations
Soft Reset
NET+OS provides an internal facility to enact a soft reset, but it is the responsibility of a
specific implementation to choose a reasonable trigger to invoke it. One choice is to use a
GPIO pin as a signal to trigger a soft reset. The embedded modules have one GPIO pin
(PORTC5) which is not normally assigned to any other task named "/INIT." It is an ideal
candidate for use as a signal for soft reset. The signal is wired to the push button on the
module (next to the LEDs), and is pulled high unless the button is pushed.
The "naresetapp" sample application demonstrates a simple mechanism for monitoring a
GPIO pin and then initiating a soft reset when the pin achieves a particular value.
Flash
General Information
The embedded modules have 4 MB of flash memory, which is controlled by chip select 0,
located at 0x02000000.
Memory
Both modules have 8 MB of SDRAM memory, controlled by chip select 1, located at
0x00000000 in the processor address space and aliased at 0x04000000 and 0x08000000.
The application program is loaded at address 0x08080000.
Reset Characteristics
Characteristic Specification
Delay 200 milliseconds (typical)
Threshold 2.93 V
Minimum Hold Time 1 microsecond pulse