NS9210 Processor Module Hardware Reference 90001002_A August 2008
©2008 Digi International Inc. All rights reserved. Digi, Digi International, the Digi logo, a Digi International Company, Digi JumpStart Kit, ConnectCore, NET+, NET+OS and NET+Works are trademarks or registered trademarks of Digi International, Inc. in the United States and other countries worldwide. All other trademarks are the property of their respective owners.
Contents ....................................................................... Customer support .............................................................................. 7 Chapter 1: About the Module .............................. 9 Features and functionality ............................................................10 Module variant ................................................................................10 Module pinout .....................................................................
GPIO multiplex table .........................................................................28 External interrupts ............................................................................32 Interfaces ................................................................................33 10/100 Mbps Ethernet port ..................................................................33 UART ............................................................................................33 SPI .......................
..... LEDs ...................................................................................... 44 WLAN LED LE7 ................................................................................. 44 Power LEDs, LE3 and LE4 .................................................................... 44 User LEDs, LE5 and LE6 ...................................................................... 44 Serial status LEDs .............................................................................
Power Jack, X24 ...............................................................................58 Ethernet interface .....................................................................58 RJ-45 pin allocation, X19 ....................................................................59 LEDs .............................................................................................60 Peripheral (expansion) headers ......................................................60 Peripheral application header, X33 ..
..... This guide provides information about the Digi NS9210 Processor Module embedded core module. Conventions used in this guide This table describes the typographic conventions used in this guide: This convention Is used for italic type Emphasis, new terms, variables, and document titles. monospaced type Filenames, pathnames, and code examples. Digi information ..................................................................................
ConnectCore 9P 9215 Hardware Reference
About the Module C H A P T E R 1 T he NS9210 Processor Module is part of the ConnectCore embedded core processor module family. Built on leading Digi technology, the network-enabled ConnectCore 9P family provides a modular and scalable core processor solution that significantly minimizes hardware and software design risk. This module combines superior performance and a complete set of integrated peripherals and component connectivity options in a compact and versatile form factor.
Chapter 1 Features and functionality ..................................................................................
..... Pinout legend: Type I Input O Output I/O Input or output P Power X1 pinout X1 pin number Type Module functionality Usage on Development board Comments 1 P GND GND 2 P GND GND 3 I RSTIN# RSTIN# 10k pull-up on module 4 O PWRGOOD PWRGOOD Output of the reset controller push pull with 470R current limiting resistor www.digiembedded.
Chapter 1 X1 pin number Type Module functionality Usage on Development board 20 P GND GND 21 I/O D0 D0 Comments Buffered Data - only active when either CS0# or CS2# is active NS9215 D[31:16] 12 22 I/O D1 D1 23 I/O D2 D2 24 I/O D3 D3 25 I/O D4 D4 26 I/O D5 D5 27 I/O D6 D6 28 I/O D7 D7 29 I/O D8 D8 30 I/O D9 D9 31 I/O D10 D10 32 I/O D11 D11 33 I/O D12 D12 34 I/O D13 D13 35 I/O D14 D14 36 I/O D15 D15 37 P GND GND 38 O AO AO 39
..... www.digiembedded.
Chapter 1 X1 pin number Type Module functionality Usage on Development board Comments 78 P VRTC VRTC Backup Battery for RTC, for 3V cell. Can be left floating, if RTC backup not needed. 79 P VLIO VLIO Mobile: Power from Li-Ion Battery (2.5V-5.5V) Non-Mobile: connected to 3.
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Chapter 1 X2 pin number Type Module functionality 10 I/O TXDA/ Usage on Development board Comments Timer8_In/ Timer7_Out/ GPIO7/ SPI_TX (dup) 11 I/O DCDC#/ DMA1_DONE/ Timer8_Out/ GPIO8/ SPIB_EN (dup)/ 12 I/O CTSC#/ I2C_SCK/ EIRQ0 (dup)/ GPIO9/ PIC_DBG_DATA_IN 13 I/O DSRC#/ QDCI/ EIRQ1 (dup) GPIO10/ PIC_DBG_CLK 14 I/O RXDC/ DMA1_DP/ EIRQ2 (dup)/ GPIO11/ SPI_RXboot 15 I/O RIC#/ RXCLKC I2C_SDA/ RST_DONE/ GPIO12/ SPI_CLK (dup) 16 I/O RTSC#/ QDCQ/ Ext Timer Event Out Ch 9/ GPIO13/ SPI_C
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Chapter 1 X2 pin number Type Module functionality 27 I/O DCDD# (dup) / PIC_0_BUS_1[16] PIC_1_BUS_1[16] GPIO59/ 28 I/O CTSD# (dup)/ PIC_0_BUS_1[17] PIC_1_BUS_1[17] GPIO60/ 29 I/O DSRD# (dup)/ PIC_0_BUS_1[18] PIC_1_BUS_1[18] GPIO61/ 30 I/O RXDD (dup)/ PIC_0_BUS_1[19] PIC_1_BUS_1[19] GPIO62/ 31 I/O RID# (dup)/ PIC_0_BUS_1[20] PIC_1_BUS_1[20] GPIO63/ 32 I/O RTSD# (dup) / RS485CTLD(dup) / PIC_0_BUS_1[21] PIC_1_BUS_1[21] GPIO64/ 33 I/O TXCLKD (dup) / DTRD# (dup) / PIC_0_BUS_1[22] PIC_1_BUS
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Chapter 1 X2 pin number Type Module functionality 47 I/O PIC_0_CTL_IO[3] PIC_1_CTL_IO[3] Timer5_In/ GPIO79 48 I/O PIC_0_BUS_0[0] PIC_1_BUS_0[0] Timer6_In (dup)/ GPIO80 49 I/O PIC_0_BUS_0[1] PIC_1_BUS_0[1] Timer7_In (dup)/ GPIO81 50 I/O PIC_0_BUS_0[2] PIC_1_BUS_0[2] Timer8_In (dup)/ GPIO82 51 I/O PIC_0_BUS_0[3] PIC_1_BUS_0[3] Timer9_In (dup)/ GPIO83 52 I/O PIC_0_BUS_0[4] PIC_1_BUS_0[4] Timer0_Out/ GPIO84 53 I/O PIC_0_BUS_0[5] PIC_1_BUS_0[5] Timer1_Out/ GPIO85 54 I/O PIC_0_BUS_0[6]
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Chapter 1 X2 pin number Type Module functionality 67 I VIN0_ADC 68 I VIN1_ADC 69 I VIN2_ADC 70 I VIN3_ADC 71 I VIN4_ADC 72 I VIN5_ADC 73 I VIN6_ADC 74 I VIN7_ADC 75 P VSS_ADC Connected on module to AGND through 0Ω resistor 76 P VREF_ADC 100nF decoupling capacitor between VREF_ADC and VSS_ADC 77 P 3.3V 78 P 3.
..... Configuration pins — CPU .................................................................................. None of the 64 GPIO pins on connector X2 disturb CPU boot strap functions. The boot strap functions are controlled by address signals; the user can not disturb boot strap functions from outside, if the module configuration signals, described below, are correctly configured. Default module CPU configuration www.digiembedded.
Chapter 1 Configuration pins — Module .................................................................................. The NS9210 Processor Module supports the following JTAG signals: TCK, TMS, TDI, TDO, TRST#, and RTCK. Selection can be made between ARM debug mode and boundary scan mode with the signal OCD_EN#.
..... Signal name Function PU/PD Comment SW_CONF1 User-defined software configuration pin; can be read in GEN ID register bit 5, default high Connected to A14 through a 2k2 series resistor.Read bit 5 of GEN ID register (@ 0xA0900210). SW_CONF2 User-defined software configuration pin; can be read in GEN ID register bit 6, default high Connected to A15 through a 2k2 series resistor. Read bit 6 of GEN ID register (@ 0xA0900210).
Chapter 1 CPU clock = 299.8272 MHz / 2 = 149.9136 MHz AHB clock = 149.9136 MHz / 2 = 74.9568 MHz Changing the CPU speed After powerup, software can change the PLL settings by writing to the PLL configuration register (@ 0xA090_0188) Important: When PLL parameters are changed, a reset is provided for the PLL to stabilize. Applications using this feature need to be aware the SDRAM contents will be lost. See reset behavior in the table below. Reset Behavior RESET _n pin SRESET _n pin PLL Config Reg.
..... Chip selects .................................................................................. The module has eight chip selects: four for dynamic memory and four for static memory. Each chip select has a 256MB range. Chip select memory map Name CPU Sig.
Chapter 1 Pin notes GPIO multiplex table UART SPI Ethernet DMA I2C port Timers and interrupt inputs Memory bus data GPIO [15:0] allow five multiplex modes. GPIO [103:16] and GPIO_A [3:0] have four multiplex modes. Using a pin as GPIO means always to give up other functionalities. Some functions are duplicated to enhance the chance to use them without giving up other vital functions. Using original and (dup) functions in parallel is not recommended.
..... Port name, Function 03 Alternate function 00 Alternate function 01 Alternate function 02 Alternate function 04 (only GPIO00...
Chapter 1 Port name, Function 03 Alternate function 00 Alternate function 01 Alternate function 02 GPIO31 D15 TXDD Reserved Reserved for upper data lines GPIO32 MII_MDC PIC_0_GEN_IO[0] Reserved MII Interface GPIO33 MII_TXC PIC_0_GEN_IO[1] Reserved MII Interface GPIO34 MII_RXC PIC_0_GEN_IO[2] Reserved MII Interface GPIO35 MII_MDIO PIC_0_GEN_IO[3] Reserved MII Interface GPIO36 MII_RXDV PIC_0_GEN_IO[4] Reserved MII Interface GPIO37 MII_RXER PIC_0_GEN_IO[5] Reserved MII In
..... Port name, Function 03 Alternate function 00 Alternate function 01 Alternate function 02 GPIO61 DSRD# (dup) PIC_0_BUS_1[18] PIC_1_BUS_1[18] DSRD# GPIO62 RXDD (dup) PIC_0_BUS_1[19] PIC_1_BUS_1[19] RXDD GPIO63 RID# (dup) PIC_0_BUS_1[20] PIC_1_BUS_1[20] RID# GPIO64 RTSD# / 485CTLD (dup) PIC_0_BUS_1[21] PIC_1_BUS_1[21] RTSD# TXCLKD (dup) / PIC_0_BUS_1[22] PIC_1_BUS_1[22] DTRD# GPIO65 Alternate function 04 (only GPIO00...
Chapter 1 Port name, Function 03 Alternate function 00 Alternate function 01 Alternate function 02 Alternate function 04 (only GPIO00...
..... External interrupt GPIO multiplexing Other functions, 1st position EIRQ2 GPIO4 X2.7 GPIO11 X2.14 GPIO5 X2.8 GPIO67 X2.35 GPIO101 X2.64 EIRQ3 Comments EIRQ3# is used on the development board to implement I²C I/O expander interrupt functionality. Interfaces .................................................................................. 10/100 Mbps Ethernet port The NS9215 10/100 Mbps Ethernet MAC allows a glueless connection of a 3.
Chapter 1 Master: 33.33 Mbps Slave: 7.50 Mbps The SPI module is made of four signals: RXD, TXD, CLK and CS# The I2C bus is completely free on the module - no EEPROM and no RTC - since the RTC is in the processor. I 2 C bus The I²C clock is max 400kHz. I2C signals are provided on the module with 4k7 pull-up resistors. The RTC is integrated in the processor and has its own 32.768 KHz clock crystal. RTC When powered by VBAT, RTC unit will function until VBAT (X1.78) reaches a threshold of 2.
About the Development Board C H A P T E R 2 T he NS9210 Processor Module Development board supports the NS9210 Processor Module. This chapter describes the components of the development board and explains how to configure the board for your requirements. The development board has two 4x20 pin connectors that are 1:1 copies of the module pins.
Chapter 2 36 +9/30VDC power supply Current measurement option Development board + Module, and module alone 3.3V coincell battery with socket PoE connectors for optional application kit (IEEE 802.3af) Prototyping area (15 x 28 holes) with +3.
..... The development board www.digiembedded.
Chapter 2 User interface .................................................................................. The NS9210 Processor Module Development board implements two user buttons and two user LEDs in addition to those provided on the module. The user LEDs on the development board can be enabled or disabled by correctly setting jumper J5&6. The table below shows which NS9215 GPIO is available for implementing the user interface.
..... Switches and pushbuttons .................................................................................. Configuration switch, S4 Power Switch, S2 Reset button S3 Serial Port B (MEI) configuration switch S1 Wake Up button S8 User Button 1 S6 User Button 2 S7 Reset control, S3 The reset pushbutton, S3, resets the module. On the module, RSTOUT# and PWRGOOD are produced for peripherals. A pushbutton allows manual reset by connecting RSTIN# to ground.
Chapter 2 User pushbuttons, S6 and S7 Use the user pushbuttons to interact with the applications running on the NS9210 Processor Module. Use these module signals to implement the pushbuttons: Signal name Switch (pushbutton) GPIO used USER_PUSH_BUTTON_1 S6 GPIO81 USER_PUSH_BUTTON_2 S7 GPIO84 Legend for multipin switches Switches 1 and 4 are multi-pin switches. In the description tables for these switches, the pin is designated as S[switch number].[pin number].
..... Serial Port B MEI configuration switches, S1 Use S1 to configure the line interface for serial port B MEI: Switch pin Function S1.1 On = RS232 transceiver enabled RS422/RS485 transceivers disabled Off = RS232 transceiver disabled RS422/RS485 transceivers enabled S1.2 On = Auto Power Down enabled Off = Auto Power Down disabled S1.3 Comments Auto Power Down is not supported on this board.
Chapter 2 Jumpers ..................................................................................
..... Jumper functions Jump er Name If connection made Default J1 Enable transceiver This jumper allows to disable the console RS232 transceiver. Connection made = console active J2 Battery enable Supplies the real time clock with 3V from the battery (lithium coin cell battery, G1) even if the board is switched off. This is for keeping time in the RTC. Connection not made = Backup battery disabled J3 WLAN_DISABLE# Reserved for future use.
Chapter 2 LEDs .................................................................................. Power LED 9-30V, LE3 Power LED +3.3V, LE4 WLAN LED LE7 Serial Port D status LEDs Serial Port B status (MEI) LEDs User LED2, LE6 User LED1, LE5 WLAN LED LE7 Reserved for future use. Power LEDs, LE3 and LE4 The power LEDs are all red LEDs. These power supplies must be present and cannot be switched. User LEDs, LE5 and LE6 44 LE3 ON indicates the +9VDC / +30VDC power is present.
..... Serial status LEDs Status LEDs Serial Port D LEDs Signal name LED GPIO used USER_LED1# LE5 GPIO82 USER_LED2# LE6 GPIO85 The development board has two sets of serial port LEDs — four for serial port D and eight for serial port B. The LEDs are connected to the TTL side of the RS232 or RS422/485 transceivers. Green means corresponding signal high. Red means corresponding signal low. The intensity and color of the LED will change when the voltage is switching.
Chapter 2 Serial UART ports .................................................................................. The development board supports the four serial ports available on the NS9210 Processor Module. Serial Port D (RS232), X3 Serial Port B (MEI) X6 Serial Port A TTL X4 Serial Port C TTL, X5 Serial port D, RS232 The serial (UART) port D connector, X3, is a DSUB9 male connector and is also used as the standard console.
..... Serial port D pins are allocated as shown: Pin Function Defaults to 1 DCD# GPIO59 2 RXD GPIO62 3 TXD GPIO66 4 DTR# GPIO65 5 GND 6 DSR# GPIO61 7 RTS# GPIO64 8 CTS# GPIO60 9 RIB# GPIO63 By default, Serial D signals are configured to their respective GPIO signals. It is the responsibility of the driver to configure them properly. Serial port A TTL interface The serial (UART) port A interface is a TTL interface connected to a 2x5 pin, 0.1” connector, X4.
Chapter 2 Serial port C TTL interface The serial (UART) port C interface is a TTL interface connected to a 2x5 pin, 0.1” connector, X5. The connector supports only TTL level. The serial port C interface corresponds to the NS9215 UART port C. The signals are shared with the HDLC interface. Serial port C pins are allocated as shown: Pin Function Defaults to 1 DCDC#/TXCLKC GPIO8. 2 DSRC# GPIO10.
..... Serial port B, MEI interface The serial (UART) port B connector, X6, is a DSUB9 male connector. This asynchronous serial port is DTE and requires a null-modem cable to connect to a computer serial port. The serial port B MEI (Multiple Electrical Interface) interface corresponds to NS9215 UART port B. The line drivers are configured using switch S1. Note that all pins on S1 contribute to the line driver settings for this port.
Chapter 2 I2C interface .................................................................................. I2C header, X15 I 2 C header I 2 C digital I/O expansion 50 I2C digital I/Os, X44 The I²C interface has only one device connected to the bus on the development board - an I/O expander (see next paragraph). Otherwise, additional I²C devices (like EEPROMs) can be connected to the module by using I²C header X15. The pinning of this header is provided below. Pin Signal 1 I2C_SDA/GPIO103 2 +3.
..... The I/O expander is a Philips PCA9554D at I2C address 0x20 / 0x21. The pins are allocated as shown: www.digiembedded.
Chapter 2 SPI interface .................................................................................. SPI header, X8 The development board provides access to the SPI interface on the module using the SPI connector, X8. The SPI interface on the development board is shared with UART_A (NS9215 port A). Because the module’s SPI interface is shared with a UART interface, you cannot use both simultaneously. Note: The default configuration of UART port A is to support GPIOs.
..... Pin allocation www.digiembedded.com SPI connector pins are allocated as shown: Pin Signal 1 +3.
Chapter 2 Current Measurement Option .................................................................................. The Current Measurement Option uses 0.025R ohm series resistors to measure the current. The NS9210 Processor Module Development board allows to measure: the current used by the development board and module (through R80), and the current used by the internal NS9215 1.
..... How the CMO works To measure the load current used on different power supplies, measure DC voltage across the sense (CMO) resistor. The value of the resistor is 0.025R ± 1%. Calculate the current using this equation: I = U/R where I = current in Amps U = measured voltage in Volts R = 0.025 Ohms JTAG interface .................................................................................. JTAG Multi-Ice connector X13 www.digiembedded.
Chapter 2 Standard JTAG ARM connector, X13 The standard JTAG ARM connector is a 20-pin header and can be used to connect development tools such as Digi’s JTAG Link, ARM’s Multi-ICE, Abatron BDI2000, and others. Pin Signal Pin Signal 1 +3.3V 2 +3.3V 3 TRST# 4 GND 5 TDI 6 GND 7 TMS 8 GND 9 TCK 10 GND 11 RTCK (optional) 12 GND 13 TDO 14 GND 15 SRESET# 16 GND 17 No connect 18 GND 19 No connect 20 GND PoE module connectors - IEEE802.3af .............................
..... Power Jack, X24 PoE header, X9 PoE header, X26 The PoE module Plug in the PoE module at a right angle to the development board, as shown in this drawing: PoE module Jump Start development board www.digiembedded.
Chapter 2 This is how the PoE input connector pins are allocated: X9 Pin Signal 1 POE_TX_CT 2 POE_RX_CT 3 POE_RJ45_4/5 4 POE_RJ45_7/8 This is how the PoE output connector pins are allocated: X26 Pin Signal 1 +12V_PoE 2 +12V_PoE 3 GND 4 GND 5 PoE_GND 6 PoE_GND POE_GND The development board provides access to POE_GND allowing it to be turned off when power is provided through Power Jack X26.4 and X26.5.
..... Ethernet RJ-45, X19 RJ-45 pin allocation, X19 RJ-45 connector pins are configured as shown: Pin Signal 802.3af End-Span (mode A) 1 TXD+ Negative VPort Transmit data + 2 TXD- Negative VPort Transmit data - 3 RXD+ Positive VPort Receive data + 4 EPWR+ Positive VPort Power from switch + 5 EPWR+ Positive VPort Power from switch + 6 RXD- 7 EPWR+ Negative VPort Power from switch - 8 EPWR+ Negative VPort Power from switch - www.digiembedded.com 802.
Chapter 2 LEDs The RJ-45 connector has two LEDs located near the outer lower corners of the connector. These LEDs are not programmable. LED Description Yellow Network activity (speed): Flashing when network traffic detected; Off when no network traffic detected. Green Network link: On indicates an active network link; Off indicates that no network link is present. Peripheral (expansion) headers ..................................................................................
..... The development board provides one, 2x25-pin, 0.10” (2.54mm) pitch header for supporting application-specific daughter cards/expansion boards: Peripheral application header, X33 X33, Peripheral application header. Provides access to an 16-bit data bus, 10bit address bus, and control signals (such as CE#, IRQ#, WE#), as well as I2C and power (+3.3V). Using these signals, you can connect Digi-specific extension modules or your own daughter card to the module’s address/data bus.
Chapter 2 Module and test connectors .................................................................................. The NS9210 Processor Module plugs into the module connectors X1 and X2 on the development board. Test Connector, X10, X11 Module connector, X1 Module connector, X2 Test connector, X20, X21 Module connectors See “Module pinout” on page 12 for related information. Test connectors The development board provides two 4x20 pin test connectors, labeled X10/X11 and X20/X21.
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Chapter 2 X11 pin Signal X11 pin Signal C10 BA1 D10 BA2 C11 BA5 D11 BA6 C12 BA9 D12 BA10 C13 BA13 D13 BA14 C14 GND D14 EXT_OE# C15 EXT_CS2# D15 BE2# C16 EXT_CLK D16 GND C17 (ETH_TPIP) NC D17 NC (ETH_LINK#) C18 GND D18 Reserved* C19 Reserved* D19 Reserved* C20 3.3V D20 GND *USB signals are reserved for future use.
..... X20 pin Signal X20 pin Signal A19 ADC_IN6 B19 ADC_IN7 A20 +3.3V B20 +3.
Chapter 2 66 NS9210 Processor Module Hardware Reference
Appendix A:Specifications T his appendix provides NS9210 Processor Module and electrical specifications, as well as module and development board mechanical specifications. Environmental specifications ..................................................................................
A Use a screwdriver and other tools with insulated handles. Wear safety glasses or goggles. Installation of inside wiring may bring you close to electrical wire, conduit, terminals and other electrical facilities. Extreme caution must be used to avoid electrical shock from such facilities. Avoid contact with all such facilities. Protectors and grounding wire placed by the service provider must not be connected to, removed, or modified by the customer.
..... Typical module current / power measurements .................................................................................. The following illustrates typical power consumption when all clocks are active and the ethernet is connected to a 100Mb network. With FIMs (DRPIC) enabled3, 4 3, 4 With FIMs (DRPIC) disabled VLIO 1 +3.3V 2 Total Power 1.27 (384mA @ 3..3V) .561W (170mA @ 3.3V) 1.83W .904W (274mA @ 3.3V) .561W (170mA @ 3.3V) 1.47W 1 VLIO is supplying the core voltage regulator.
A Module, top view Note: Measurements are in millimeters. Module, side view Note: Measurements are in millimeters.
..... Layout recommendation .................................................................................. Below are the mechanical dimensions of the standard NS9210 Processor Module. The layout of the NS9210 Processor Module JumpStart board is consistent with the recommendations from Berg/FCI for the mating connector (Berg/FCI 61083084409LF). There is a 41mm separation between the two module connectors. Drawing number 61083 on the FCI web page: www.fciconnect.
A Device Berg/FCI connector NS9210 Processor Module 61082-081409LF NS9210 Processor Module JumpStart board 61083-084409LF (mating connector on the base board) 72 NS9210 Processor Module Hardware Reference
..... Reset and edge sensitive input timing requirements .................................................................................. The critical timing requirement is the rise and fall time of the input. If the rise time is too slow for the reset input, the hardware strapping options may be registered incorrectly. If the rise time of a positive-edge-triggered external interrupt is too slow, then an interrupt may be detected on both the rising and falling edge of the input signal.
A 74 NS9210 Processor Module Hardware Reference
Appendix B:Certifications T he NS9210 Processor Module product complies with the standards cited in this section. FCC Part 15 Class B .................................................................................. Radio Frequency Interface (RFI) (FCC 15.105) The NS9210 Processor Module has been tested and found to comply with the limits for Class B digital devices pursuant to Part 15 Subpart B, of the FCC rules.
B If the FCC ID is not visible when installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module FCC ID. THis exterior label can use wording such as the following: “Contains Transmitter Module FCC ID: MCQ-50M1355/ IC: 1846A50M1355”. Modifications (FCC 15.21) Changes or modifications to this equipment not expressly approved by Digi may void the user’s authority to operate this equipment.
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B International EMC Standards The NS9210 Processor Module meets the following standards: Standards NS9210 Processor Module Emissions FCC Part 15 Subpart B ICES-003 Immunity EN 55022 EN 55024 Safety UL 60950-1 CSA C22.2, No.
ConnectCore 9P 9215 Hardware Reference
