Datasheet

FMC-HDMI™ Reference Manual
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 3 of 4
1.2 HDMI2: Analog Devices AD8195 Buffer
The AD8195 is an HDMI buffer with equalized TMDS inputs and optionally pre-emphasized TMDS outputs. The
AD8195 includes bidirectional buffering for the DDC bus and bidirectional buffering with integrated pull-up
resistors for the CEC bus. The DDC and CEC buffers are powered independently of the TMDS buffers so that
DDC/CEC functionality can be maintained when the system is powered off.
An on-board pre-programmed EEPROM is connected to the DDC (Display Data Channel) bus of the HDMI2 port.
The following EDID (Extended Display Identification Data) is programmed in the factory:
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0
0
0x0
0
0xFF 0xFF 0xFF
0xF
F
0xF
F
0xFF 0x00 0x10
0xE
C
0x0
0
0x01
0x0
0
0x0
0
0x0
0
0x0
0
1
0
0xFF
0x1
6
0x0
1
0x03
0x8
1
0x3
3
0x1
D
0x78 0x02
0x0
1
0xF
1
0xA
2
0x5
7
0x5
2
0x9
F
0x2
7
2
0
0x0
A
0x5
0
0x5
4
0xBF
0xE
F
0x8
0
0x01 0x01 0x01
0x0
1
0x0
1
0x01
0x0
1
0x0
1
0x0
1
0x0
1
3
0
0x0
1
0x0
1
0x0
1
0x01
0x0
1
0x0
1
0x01
0x1
D
0x00
0x7
2
0x5
1
0xD
0
0x1
E
0x2
0
0x6
E
0x2
8
4
0
0x5
5
0x0
0
0x0
0
0xD
0
0x5
2
0x0
0
0x00 0x1E 0x00
0x0
0
0x0
0
0xFC
0x0
0
0x4
4
0x6
9
0x6
7
5
0
0x6
9
0x6
C
0x6
5
0x6E
0x7
4
0x2
0
0x48 0x44
0x4
D
0x4
9
0x0
0
0x00
0x0
0
0x1
0
0x0
0
0x0
0
6
0
0x0
0
0x0
0
0x0
0
0x00
0x0
0
0x0
0
0x00 0x00 0x00
0x0
0
0x0
0
0x00
0x0
0
0x0
0
0x0
0
0x1
0
7
0
0x0
0
0x0
0
0x0
0
0x00
0x0
0
0x0
0
0x00 0x00 0x00
0x0
0
0x0
0
0x00
0x0
0
0x0
0
0x0
0
0x0
E
Table 2. EEPROM pre-programmed content.
The EEPROM can be freely re-written through the J4 header holes and 6-pin Pmod cable. During EEPROM
programming, power to the EEPROM is provided by pin 6 of J4, so make sure there is no HDMI cable plugged in at
the same time.
Below are the pin-outs from the AD8195 Buffer and other HDMI2 port signals to the FMC connector:
FMC Pin HDMI2 Function FMC Pin HDMI2 Function
LA06_P HDMI2_D0_P LA01_N_CC HDMI2_CLK_N
LA06_N HDMI2_D0_N LA13_P HDMI2_SCL
LA05_P HDMI2_D1_P LA13_N HDMI2_SDA
LA05_N HDMI2_D1_N LA09_P HDMI2_PE_EN
LA10_P HDMI2_D2_P LA09_N HDMI2_TX_EN
LA10_N HDMI2_D2_N LA17_N_CC HDMI2_HPA
LA01_P_CC HDMI2_CLK_P LA18_N_CC HDMI2_CEC_OUT
Table 3. HDMI2-FMC pin mapping.
WARNING: VADJ must be 3.3V to properly use the buffer on HDMI2. The TX_EN pin is held low by default, so the
buffer is disabled on power-up. With the buffer disabled, VADJ can be in the range of (1.8V-3.3V).