User Manual

Digital Discovery's high-level block diagram is presented in Figure 2, below. The core of the Digital Discovery 2 is the Xilinx®
Spartan®-6 FPGA (specifically, the XC6SLX25-2 device). The WaveForms application automatically programs the Discovery’s FPGA at
start-up with a configuration file designed to implement a multi-function test and measurement instrument. Once programmed, the
FPGA inside the Discovery communicates with the PC-based WaveForms application via a USB 2.0 connection. The WaveForms
software works with the FPGA to control all the functional blocks of the Digital Discovery, including setting parameters, acquiring data,
and transferring and storing data into the DDR3 memory. Signals and equations also use certain naming conventions. Signals in the Input
block use “DIN” prefix to indicate these are inputs only. Signals in the Input/Output block use “DIO” prefix. Signals at the user
connectors include “USR” in their names, while signals at the FPGA pins include “FPGA”. Signals at the FPGA pins driving the pull
resistors for DIO signals, include “PULL” in their names. DIN inputs are indexed 0 to 23, DIO input/outputs are indexed 24 to 39.
Memory signals have the “DDR” prefix. Supply rails show the voltage with the
VCC () prefix. Referring to the block diagram in Figure 2
below:
1.1 Architectural Overview and Block Diagram