Datasheet

ENC424J600/624J600
DS39935C-page 120  2010 Microchip Technology Inc.
REGISTER 13-2: EIE: ETHERNET INTERRUPT ENABLE REGISTER
R/W-1 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
INTIE MODEXIE HASHIE AESIE LINKIE
r r r
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R-1 R/W-0 R/W-0 R/W-0 R/W-0
r PKTIE DMAIE r
(1)
TXIE TXABTIE RXABTIE PCFULIE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15
INTIE: INT Global Interrupt Enable bit
1 = INT pin is controlled by the INT status bit (ESTAT<15>)
0 = INT pin is driven high
bit 14
MODEXIE: Modular Exponentiation Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 13
HASHIE: MD5/SHA-1 Hash Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 12
AESIE: AES Encrypt/Decrypt Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 11
LINKIE: PHY Link Status Change Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 10-7
Reserved: Write as ‘0’
bit 6
PKTIE: RX Packet Pending Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 5
DMAIE: DMA Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 4
Reserved: Ignore on read, don’t care on write
(1)
bit 3 TXIE: Transmit Done Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2
TXABTIE: Transmit Abort Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1
RXABTIE: Receive Abort Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 0
PCFULIE: Packet Counter Full Interrupt Enable bit
1 = Enabled
0 = Disabled
Note 1: This bit is read-only and cannot be cleared. Hardware does not modify it.