Datasheet

ENC424J600/624J600
DS39935C-page 20  2010 Microchip Technology Inc.
TABLE 3-1: ENC424J600/624J600 SFR MAP (SPI INTERFACE)
Banked Register
Addresses
Bank 0
(00h offset)
Bank 1
(20h offset)
Bank 2
(40h offset)
Bank 3
(60h offset)
Unbanked
(1)
(80h offset)
Unbanked
Address
Name
Unbanked
Address
Name
Unbanked
Address
Name
Unbanked
Address
Name
Unbanked
Address
Name
00 00 ETXSTL 20 EHT1L 40 MACON1L 60 MAADR3L 80 EGPDATA
(2)
01 01 ETXSTH 21 EHT1H 41 MACON1H 61 MAADR3H 81 Reserved
02 02 ETXLENL 22 EHT2L 42 MACON2L 62 MAADR2L 82 ERXDATA
(2)
03 03 ETXLENH 23 EHT2H 43 MACON2H 63 MAADR2H 83 Reserved
04 04 ERXSTL 24 EHT3L 44 MABBIPGL 64 MAADR1L 84 EUDADATA
(2)
05 05 ERXSTH 25 EHT3H 45 MABBIPGH 65 MAADR1H 85 Reserved
06 06 ERXTAILL 26 EHT4L 46 MAIPGL 66 MIWRL 86 EGPRDPTL
07 07 ERXTAILH 27 EHT4H 47 MAIPGH 67 MIWRH 87 EGPRDPTH
08 08 ERXHEADL 28 EPMM1L 48 MACLCONL 68 MIRDL 88 EGPWRPTL
09 09 ERXHEADH 29 EPMM1H 49 MACLCONH 69 MIRDH 89 EGPWRPTH
0A 0A EDMASTL 2A EPMM2L 4A MAMXFLL 6A MISTATL 8A ERXRDPTL
0B 0B EDMASTH 2B EPMM2H 4B MAMXFLH 6B MISTATH 8B ERXRDPTH
0C 0C EDMALENL 2C EPMM3L 4C Reserved 6C EPAUSL 8C ERXWRPTL
0D 0D EDMALENH 2D EPMM3H 4D Reserved 6D EPAUSH 8D ERXWRPTH
0E 0E EDMADSTL 2E EPMM4L 4E Reserved 6E ECON2L 8E EUDARDPTL
0F 0F EDMADSTH 2F EPMM4H 4F Reserved 6F ECON2H 8F EUDARDPTH
10 10 EDMACSL 30 EPMCSL 50 Reserved 70 ERXWML 90 EUDAWRPTL
11 11 EDMACSH 31 EPMCSH 51 Reserved 71 ERXWMH 91 EUDAWRPTH
12 12 ETXSTATL 32 EPMOL 52 MICMDL 72 EIEL 92 Reserved
13 13 ETXSTATH 33 EPMOH 53 MICMDH 73 EIEH 93 Reserved
14 14 ETXWIREL 34 ERXFCONL 54 MIREGADRL 74 EIDLEDL 94 Reserved
15 15 ETXWIREH 35 ERXFCONH 55 MIREGADRH 75 EIDLEDH 95 Reserved
16 16 EUDASTL 36 EUDASTL 56 EUDASTL 76 EUDASTL 96 Reserved
17 17 EUDASTH 37 EUDASTH 57 EUDASTH 77 EUDASTH 97 Reserved
18 18 EUDANDL 38 EUDANDL 58 EUDANDL 78 EUDANDL 98 Reserved
19 19 EUDANDH 39 EUDANDH 59 EUDANDH 79 EUDANDH 99 Reserved
1A 1A ESTATL 3A ESTATL 5A ESTATL 7A ESTATL 9A Reserved
1B 1B ESTATH 3B ESTATH 5B ESTATH 7B ESTATH 9B Reserved
1C 1C EIRL 3C EIRL 5C EIRL 7C EIRL 9C Reserved
1D 1D EIRH 3D EIRH 5D EIRH 7D EIRH 9D Reserved
1E 1E ECON1L 3E ECON1L 5E ECON1L 7E ECON1L 9E
—
1F 1F ECON1H 3F ECON1H 5F ECON1H 7F ECON1H 9F
—
Note 1: Unbanked SFRs can be accessed only by unbanked SPI opcodes.
2: When using these registers to access the SRAM buffer, use only the N-byte SRAM instructions. See Section 4.6.2
“Unbanked SFR Operations” and Section 4.6.3 “SRAM Buffer Operations” for more details.