Datasheet

ENC424J600/624J600
DS39935C-page 30 2010 Microchip Technology Inc.
REGISTER 3-2: MICMD: MII MANAGEMENT COMMAND REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
MIISCAN MIIRD
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-2 Unimplemented: Read as ‘0
bit 1 MIISCAN: MII Scan Enable bit
1 = PHY register designated by MIREGADR<4:0> is continuously read and the data is copied to MIRD
0 = No MII Management scan operation is in progress
bit 0 MIIRD: MII Read Enable bit
1 = PHY register designated by MIREGADR<4:0> is read once and the data is copied to MIRD
0 = No MII Management read operation is in progress
REGISTER 3-3: MISTAT: MII MANAGEMENT STATUS REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 U-0 U-0 R-0 R-0 R-0 R-0
r NVALID SCAN BUSY
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-4 Unimplemented: Read as ‘0
bit 3 Reserved: Ignore on read
bit 2 NVALID: MII Management Read Data Not Valid Status bit
1 = The contents of MIRD are not valid yet
0 = The MII Management read cycle has completed and MIRD has been updated
bit 1 SCAN: MII Management Scan Status bit
1 = MII Management scan operation is in progress
0 = No MII Management scan operation is in progress
bit 0 BUSY: MII Management Busy Status bit
1 = A PHY register is currently being read or written to
0 = The MII Management interface is Idle