Datasheet

 2010 Microchip Technology Inc. DS39935C-page 63
ENC424J600/624J600
FIGURE 5-14: MODE 5 READ OPERATION TIMING (TWO BYTES – SAME ADDRESS)
FIGURE 5-15: MODE 5 WRITE OPERATION TIMING (TWO BYTES – SAME ADDRESS)
CS
RD
AD<14:9>
(1)
WR
AL
Note 1: AD8 must be driven by the host controller. AD<14:9> may be tied to logic high when only indirect access is desired.
Address<14:9>
AD8
(1)
Address<8>
AD<7:0>
Data<7:0>Hi-Z Hi-Z Hi-ZAddress<7:0>
T
PSP13
T
PSP12
T
PSP12
T
PSP15
T
PSP2
T
PSP3
T
PSP4
Data<7:0>
T
PSP14
CS
RD
AD<14:9>
(1)
WR
AL
Note 1: AD8 must be driven by the host controller. AD<14:9> may be tied to logic high when only indirect access is desired.
Address<14:9>
AD8
(1)
Address<8>
AD<7:0>
Data<7:0>Hi-Z Hi-ZAddress<7:0>
T
PSP13
T
PSP12
T
PSP12
T
PSP8
T
PSP10
T
PSP11
Data<7:0>
T
PSP7
T
PSP14